Stacked Electronic Component Substrate with Nested Mounting

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Solution Overview

Problem

The existing electronic component contained substrates with stacked semiconductor elements face increased planar dimensions and production costs due to longer bonding wires and complex wire-bonding configurations, especially when smaller upper semiconductor elements are mounted on larger lower elements, leading to inefficiencies in space usage and manufacturing costs.

Innovation Solution

The solution involves a pair of wiring substrates with a first electronic component mounted on one substrate and a second electronic component mounted on the first, connected via solder balls and sealed with resin, where the second component is positioned within an opening in the other substrate to reduce wire length and facilitate direct bonding, using copper core solder balls for mechanical strength and a sealing resin to encapsulate all components, thereby reducing the substrate's thickness and production costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If semiconductor elements are mounted in a two-stage stacked fashion with underfill resin, then electrical connection is achieved, but bonding wire length increases and production cost increases

Engineering Contradiction:

Improveelectrical connectionVSAvoidbonding wire length

Core Design Contradiction:

ReliabilityVSLength of moving object

Solution Approach 1:

The patent transitions from planar mounting to three-dimensional stacked mounting, placing the second semiconductor element on the upper surface of the first element rather than beside it. This vertical arrangement reduces the horizontal distance that bonding wires must travel, directly addressing the wire length issue while maintaining electrical connectivity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where the second semiconductor element is mounted on top of the first semiconductor element, which itself is mounted on the substrate. This nested arrangement allows both elements to occupy a smaller overall footprint while reducing bonding wire length through the vertical stacking configuration.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Shape

If planar dimension of upper semiconductor element is smaller than lower elements, then stacking is achieved, but bonding wire length increases and direct bonding becomes impossible

Engineering Contradiction:

Improvestacked configurationVSAvoidbonding wire length

Core Design Contradiction:

ShapeVSLength of moving object

Solution Approach 1:

The patent introduces relaying pads on the upper surface of the first semiconductor element before mounting the second element. These pre-positioned pads serve as intermediate connection points, allowing the bonding wires to connect from the second element to the first element's pads, and then from those pads to the substrate, thereby enabling direct bonding even when the upper element is smaller.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If relaying pads are provided on back surfaces of lower semiconductor elements, then electrical connection is enabled, but wire length increases and extra processing is required

Engineering Contradiction:

Improveelectrical connectionVSAvoidprocessing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Instead of placing relaying pads on the back (lower) surfaces of the first semiconductor element as in conventional designs, the patent inverts this approach by placing the relaying pads on the upper surface of the first element. This inversion allows the second element to connect directly to the pads during its mounting process, eliminating the need for separate wire-bonding operations and reducing overall processing complexity.

Inventive Principle:

Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces the planar dimension of the electronic component contained substrate, shortens bonding wire lengths, enhances electrical reliability, and lowers production costs by allowing direct wire bonding and reducing the number of resin sealing steps, while maintaining mechanical strength with copper core solder balls.

Implementation Method 1

solder balls which electrically connects the pair of wiring substrates

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the second electronic component is connected electrically to the other wiring substrate by a wire bonding

Methodology Applied

Scientific EffectWire bonding: Welding

Data Source

PatentUS7772687B2Multiple electronic component containing substrate

Publication Date: 2010.08.10 SHINKO ELECTRIC IND CO LTD

AI summary

In an electronic component contained substrate in which electronic components are mounted between a pair of wiring substrates in a plural-stage stacked fashion, one wiring substrate and other wiring substrate are connected electrically mutually via solder balls, a first electronic component is mounted on one wiring substrate and then a second electronic component is mounted on the first electronic component, an opening portion for containing the second electronic component therein is provided in the other wiring substrate, the second electronic component is contained and mounted in the opening portion and is connected electrically to the other wiring substrate by a wire bonding, and a space between the pair of wiring substrates is sealed with a sealing resin.