Stacked Data Lines and Alternating Scanning Leads for Display Crosstalk
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Solution Overview
Problem
The manufacturing process of holed full screen displays results in significant parasitic capacitance and crosstalk between sub-pixels, leading to display color differences and vertical lines due to the close proximity of data lines in the non-display region.
Innovation Solution
A display panel design featuring a base substrate with a non-display region where data lines are arranged in different layers and insulated from each other, and a scanning line with a first scanning lead that extends alternately in both directions to counteract potential interference between data lines, ensuring that the potential of charged sub-pixels remains unchanged.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If data lines are arranged in the hole region to achieve full screen display, then screen-to-body ratio is improved, but parasitic capacitance increases and crosstalk occurs between sub-pixels
Solution Approach 1:
The patent transitions data lines from a two-dimensional planar arrangement to a three-dimensional stacked configuration in the non-display region. Multiple data lines are arranged in different layers (first data line in first layer, second data line in second layer), utilizing the vertical dimension to reduce lateral spacing and parasitic capacitance while maintaining full screen coverage.
Solution Approach 2:
The patent segments data lines into multiple independent layers, with each layer containing specific data lines that are insulated from each other. This segmentation allows for better spatial distribution and reduced electromagnetic interference between adjacent data lines carrying different signals.
2Area of stationary object
If data lines are placed close together in the non-display region to maintain full screen appearance, then screen-to-body ratio is improved, but display color difference and vertical lines occur due to crosstalk
Solution Approach 1:
By stacking data lines in different layers (first layer and second layer) in the non-display region, the patent reduces the lateral distance between data lines while maintaining vertical separation through insulation layers. This three-dimensional arrangement minimizes parasitic capacitance and crosstalk that cause display color differences and vertical line artifacts.
Solution Approach 2:
The patent introduces insulation layers (first insulation layer and second insulation layer) as intermediary structures between stacked data lines. These insulation layers prevent direct electrical interaction and reduce parasitic capacitance between adjacent data lines, thereby eliminating crosstalk-induced display defects.
3Object-affected harmful factors
If multiple data lines are stacked in different layers to reduce parasitic capacitance, then crosstalk is reduced, but device structure becomes more complex
Solution Approach 1:
The patent utilizes the vertical dimension by stacking data lines in multiple layers (first layer and second layer) within the non-display region. This approach reduces parasitic capacitance and crosstalk by increasing vertical separation while maintaining compact lateral footprint, effectively managing complexity through spatial optimization.
Solution Approach 2:
The patent combines multiple data lines into a stacked configuration within the same non-display region, merging their spatial occupation vertically rather than horizontally. This consolidation reduces the overall area required while maintaining signal isolation through insulation layers, balancing structural complexity with performance benefits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces display color differences and improves the display effect by minimizing mutual interference between sub-pixels of different colors, thereby enhancing the visual quality of full screens with round holes.
Implementation Method 1
the distance between the data lines in the hole region is very small, so that a large parasitic capacitance is generated and crosstalk exists between sub-pixels
Implementation Method 2
when the potential of the data line of the charged sub-pixel is in a floating state, the influence of the potential jumping of other adjacent data lines, which do not perform charging simultaneously with the data line of the charged sub-pixel, on the data line of the charged sub-pixel can be mutually counteracted
Data Source
AI summary
Disclosed are a display panel and an electronic device. The display panel includes: a base substrate, a first non-display region, a display region surrounding the first non-display region, multiple data lines and multiple scanning lines. The display region includes multiple pixels each including m sub-pixels. In the first non-display region, at least two data lines are stacked and insulated from each other, and orthogonal projections of the at least two data lines on the base substrate are at least adjacently disposed. The multiple scanning lines do not intersect each other. At least two scanning lines each include a first scanning lead. The first scanning lead extends alternately in the first and second directions and is electrically connected to multiple pixels through first sides of the multiple pixels.