Stacked Memory Die Identifier Circuits for Unique Chip Addressing

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Solution Overview

Problem

Conflicts arise during the manufacturing of three-dimensional memory stacks due to the assignment of identical chip identifiers to different memory chips, leading to operational issues.

Innovation Solution

A method for automatically generating unique chip identifiers for semiconductor dies in a stacked structure, where each die's identifier generation circuit generates its identifier based on the neighboring die's signal, utilizing bit-shifting to ensure uniqueness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If chip identifiers are set before stacking memory chips, then the manufacturing process is simpler, but conflicts occur when different memory chips have the same identifier

Engineering Contradiction:
Improveease of manufactureVSAvoididentifier uniqueness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-configuring identifier generation circuits in each memory chip that can automatically generate unique identifiers based on the chip's position in the stack. The bottom-most chip is pre-programmed with a base identifier, and each subsequent chip contains circuitry to automatically increment or modify this identifier based on its position, ensuring uniqueness before the stacking conflict can occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where identifier generation circuits in upper chips receive signals from lower chips and adjust their identifiers accordingly. The system uses feedback loops during the stacking process to detect and resolve potential identifier conflicts, ensuring that each chip in the final stacked structure has a unique identifier by continuously monitoring and adjusting identifier assignments.

Inventive Principle:
Principle #23Feedback

2Reliability

If chip identifiers are assigned after stacking, then identifier uniqueness is ensured, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveidentifier uniquenessVSAvoidease of manufacture
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies self-service by enabling each memory chip to automatically generate its own unique identifier through on-chip identifier generation circuits. Each chip independently determines its identifier based on its position in the stack and pre-configured base values, eliminating the need for external intervention or complex post-stacking processing to ensure identifier uniqueness.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent uses preliminary action by pre-programming base identifier values and generation algorithms into each chip during manufacturing. This preliminary configuration enables automatic identifier generation at the appropriate time during stacking, combining the benefits of pre-manufacturing simplicity with post-stacking uniqueness assurance.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If manual identifier assignment is used, then identifier conflicts can be avoided, but productivity decreases due to increased processing time

Engineering Contradiction:
Improveidentifier uniquenessVSAvoidproductivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements self-service by enabling memory chips to automatically generate and manage their own identifiers without requiring manual intervention. The identifier generation circuits autonomously determine unique identifiers based on chip position and pre-configured parameters, eliminating time-consuming manual assignment processes while ensuring identifier uniqueness.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces manual mechanical identifier assignment processes with automated electronic identifier generation circuits integrated into each chip. This substitution of manual operations with automated electronic systems dramatically increases productivity while maintaining identifier uniqueness through circuit-based generation algorithms.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20250316608A1Method for automatically generating chip identifiers for semiconductor dies in stacked structure, semiconductor device, and memory device using the same
Publication Date: 2025.10.09 NAN YA TECH
  • US20250316608A1 patent drawing
  • US20250316608A1 patent drawing
  • US20250316608A1 patent drawing

AI summary

A method for automatically generating chip identifier for semiconductor dies in a stacked structure is provided. The method includes the following steps: obtaining a first semiconductor die and a second semiconductor die, wherein the first semiconductor die and the second semiconductor die include a first identifier generation circuit and a second identifier generation circuit, respectively; forming a stacked structure by stacking the second semiconductor die on the first semiconductor die, wherein the first identifier generation circuit is electrically connected to the second identifier generation circuit; and generating a first chip identifier and a second chip identifier for the first semiconductor die and the second semiconductor die by the first identifier generation circuit and the second identifier generation circuit, respectively. The second chip identifier is a bit-shifted value of the first chip identifier.