Stacked Die Assembly Double-Sided Inter-Die Bonding Noise Reduction
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Solution Overview
Problem
In stacked die assemblies, the increasing number of inter-die electrical connections leads to noise and signal interference, particularly when power signals with high voltages are routed near noise-sensitive devices like sense amplifiers, and this issue worsens as the number of semiconductor dies increases.
Innovation Solution
A stacked die assembly with double-sided inter-die bonding connections is implemented, where memory and logic dies are bonded with specific external bonding pads facing upward and downward, connected by bonding wires, minimizing noise and signal interference by routing power signals away from sensitive areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If power signals are routed through semiconductor dies in a stacked die assembly, then power transmission is achieved, but noise level in logic circuits increases due to proximity to noise-sensitive devices
Solution Approach 1:
The patent transitions from planar routing to three-dimensional vertical stacking, where power signals are routed through dedicated vertical interconnects (TSVs) between dies rather than through planar traces on the same substrate as logic circuits. This dimensional separation allows power delivery while isolating noisy power lines from sensitive logic circuits in the horizontal plane.
Solution Approach 2:
The patent divides the semiconductor structure into multiple separate dies (logic die, memory die, I/O die) stacked vertically, with each die performing specific functions. This segmentation allows power signal routing to be separated from logic circuit placement, as power can be delivered through vertical inter-die connections rather than through traces routing near sensitive logic on a single monolithic die.
2Adaptability or versatility
If the number of semiconductor dies in a stacked die assembly increases, then functionality and integration are improved, but the number of inter-die electrical connections increases
Solution Approach 1:
The patent implements a universal interconnect architecture where through-substrate vias (TSVs) serve multiple functions: they provide mechanical support between dies, enable power delivery, and carry signal connections. This multi-functionality reduces the overall complexity compared to dedicated separate structures for each function.
Solution Approach 2:
The patent merges multiple connection functions into integrated inter-die bonding structures. The inter-die bonding pads and TSVs combine mechanical bonding, electrical connection, and structural support functions into a single integrated interface between dies, reducing the number of separate components needed.
3Reliability
If additional inter-die bonding connections are made to accommodate more dies, then inter-die connectivity is improved, but wafer space is consumed
Solution Approach 1:
The patent moves bonding pads and interconnect structures from the planar wafer surface into the vertical dimension, using the thickness direction of the wafer for TSV routing and inter-die connections. This allows high-density interconnects without consuming additional lateral wafer area, as connections are formed through the thickness of the substrate rather than across its surface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces noise and signal interference by optimizing the routing of power signals, maintaining efficient inter-die connections without using additional wafer space, thereby enhancing the performance and reliability of the stacked die assembly.
Implementation Method 1
the logic-side inter-die bonding pads are bonded to a respective one of the memory-side inter-die bonding pads
Implementation Method 2
a first set of bonding wires connecting upward-facing external bonding pads; and a second set of bonding wires connecting downward-facing external bonding pads
Data Source
AI summary
Multiple bonded units are provided, each of which includes a respective front-side die and a backside die. The two dies in each bonded unit may be a memory die and a logic die configured to control operation of memory elements in the memory die. Alternatively, the two dies may be memory dies. The multiple bonded units can be attached such that front-side external bonding pads have physically exposed surfaces that face upward and backside external bonding pads of each bonded unit have physically exposed surfaces that face downward. A first set of bonding wires can connect a respective pair of front-side external bonding pads, and a second set of bonding wires can connect a respective pair of backside external bonding pads.