Stacked-Die Package with 3D Inductors
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Solution Overview
Problem
Existing electronic packages face challenges in miniaturization and cost due to the need for discrete passive components, which increase size and weight, and require custom-designed contact vias and precise photolithography for integration, limiting flexibility and scalability.
Innovation Solution
A stacked-die electronics package is proposed, where passive components are fabricated on the back side of a substrate and electrically connected to integrated circuit devices on both substrates, allowing for flexible integration without custom-designed vias or precise photolithography, using techniques like thin-film and plating processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If discrete passive components are added to electronic packages, then circuit tuning capability is improved, but package size and weight increase
Solution Approach 1:
The patent merges passive components (inductors, capacitors, resistors) directly with the integrated circuit substrate, eliminating the need for separate discrete components. This integration is achieved through conformal deposition techniques that form passive components on the substrate surface, thereby reducing overall package weight while maintaining circuit tuning capability.
Solution Approach 2:
The patent transitions from planar two-dimensional circuit layouts to three-dimensional structures by forming passive components on the substrate surface using conformal deposition. This dimensional change allows for more compact component placement and reduced package weight while preserving all necessary circuit tuning functions.
2Adaptability or versatility
If discrete passive components are added to electronic packages, then circuit tuning capability is improved, but package size increases
Solution Approach 1:
The patent combines passive components with the IC substrate in a single integrated structure, eliminating the need for additional package area that would be required for separate discrete components. The conformal deposition process allows passive components to be formed within the existing substrate footprint.
Solution Approach 2:
By moving from 2D planar layouts to 3D conformal structures, the patent enables passive components to occupy vertical space rather than horizontal space, thereby reducing the overall package area while maintaining full circuit tuning capability.
3Manufacturing precision
If custom-designed contact vias and precise photolithography are used for integrating passive components, then integration precision is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent employs self-aligned conformal deposition processes where the passive component structures automatically align with the substrate features without requiring custom-designed contact vias or precise photolithography. The conformal nature of the deposition ensures precise integration through self-alignment, reducing manufacturing complexity while maintaining high precision.
4Manufacturing precision
If custom-designed contact vias are required for each product device, then integration precision is improved, but adaptability decreases
Solution Approach 1:
The patent creates a universal substrate structure with conformal passive components that can be applied to any integrated circuit device without requiring custom-designed contact vias. The conformal deposition process is universally applicable to different substrate types and circuit configurations, thereby maintaining both precision and adaptability across product families.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient, cost-effective, and scalable integration of passive components, reducing package size and weight while maintaining performance, particularly in RF applications, by allowing passive components to be added to any integrated circuit without custom designs, thus addressing the need for miniaturization and reduced production costs.
Implementation Method 1
An electrical conductor allows electrical communications between the at least one passive component of the second substrate and at least one of the one or more integrated circuit devices of the first substrate
Implementation Method 2
using techniques like thin-film and plating processes
Implementation Method 3
using techniques like thin-film and plating processes
Data Source
AI summary
An apparatus and a method for producing three-dimensional integrated circuit packages. In one embodiment, an electronics package with at least two dice are stacked one atop another is disclosed. A top die is of smaller size compared with a bottom die such that after a die attach operation, wire-bond pads of the bottom die will be exposed for a subsequent wire bonding operation. The bottom die contains contact pads on the front side that couple with one or more passive components fabricated on the back side of the top die to complete the circuit. In another exemplary embodiment, a method to form one or more three-dimensional passive components in a stacked-die package is disclosed wherein partial inductor elements are fabricated on the front side of the bottom die and the back side of the top die. The top and bottom elements are coupled together completing the passive component.