Stacked IC Die Power Transfer via Isolation Layer Inductors
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Solution Overview
Problem
Existing integrated circuit (IC) packaging technologies face inefficiencies in power transfer between stacked die due to high loss and low coil-to-coil coupling, rendering galvanically isolated power transfer impractical.
Innovation Solution
A preformed isolation layer with inductive coils on its major surfaces is used between stacked IC die, eliminating the need for inductive coils in the die and allowing for efficient power transfer while maintaining galvanic isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an isolation layer is used to provide galvanic isolation between stacked die, then electrical isolation is achieved, but the distance between coils increases reducing power transfer efficiency
Solution Approach 1:
The patent moves the inductor coils from the traditional planar configuration within each die to a vertical stacking configuration across multiple die layers. The isolation layer with coils is positioned between stacked die, creating a three-dimensional arrangement where coils on opposite sides of the isolation layer face each other vertically. This dimensional change allows galvanic isolation to be maintained while keeping coil-to-coil distance minimal, thereby preserving power transfer efficiency.
2Power
If inductive coils are placed in both stacked die for power transfer, then power can be transferred, but coil loss is too high and coupling is too low to allow efficient power transfer
Solution Approach 1:
The patent introduces an intermediary structure - the isolation layer with integrated inductor coils - that mediates the power transfer between stacked die. Instead of relying on high-loss coils within each die, the isolation layer provides dedicated low-loss inductive paths. The coils on the isolation layer are optimally positioned and sized to minimize loss and maximize coupling, serving as an intermediate power transfer medium between the stacked die.
Solution Approach 2:
The patent changes key parameters of the inductive power transfer system by relocating coils to the isolation layer, optimizing coil size, shape, and positioning. This allows adjustment of inductance values, coupling coefficients, and loss characteristics to achieve efficient power transfer. The isolation layer coils can be designed with specific geometric parameters to optimize the balance between galvanic isolation and power transfer efficiency.
3Reliability
If isolation layer extends beyond edges of top die to provide galvanic isolation, then electrical isolation is improved, but distance between coils increases reducing coupling
Solution Approach 1:
The isolation layer serves multiple functions simultaneously: it provides galvanic isolation between stacked die, contains integrated inductor coils for efficient power transfer, and can be configured to extend beyond die edges for enhanced isolation where needed. The coils are strategically positioned on the isolation layer to maintain optimal coupling while the isolation layer structure itself handles the extension beyond edges, separating the isolation function from the power transfer function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables improved power transfer efficiency and maintains high voltage isolation, allowing for the transfer of at least 100 mW of power between die, with the option for corona shielding and efficient signal routing.
Implementation Method 1
inductive coupling allows two die to communicate by way of transmitting and receiving inductors located in each of the die
Data Source
AI summary
A packaged integrated circuit (IC) device includes a first IC die, a first layer of adhesive on a first major surface of the first IC die, and an isolation layer over the first layer of adhesive. The isolation layer has a first major surface and a second major surface, and the second major surface of the isolation layer is between the first layer of adhesive and the first major surface. The packaged IC device also includes a first inductor coil on the first major surface of the isolation layer, a second layer of adhesive on the isolation layer, and a second IC die on the second layer of adhesive.