Stacked Die Package Planarization With Gap Fill and Top Dummy Die

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Solution Overview

Problem

The challenge in semiconductor packaging is achieving flatness during the stacking of dies, which affects the reliability and production yield due to accumulated topology and stress-induced distortions, leading to bonding difficulties and voids.

Innovation Solution

A semiconductor package design that includes a stack die with a gap fill insulating layer and a top dummy die, where the gap fill insulating layer is formed using oxide materials and a spin-on deposition process, and a molding portion surrounds the stack die to address the flatness issue and improve bonding quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If direct bonding is used to vertically stack a plurality of dies, then interconnection lengths between stacked chips are reduced, but flatness cannot be realized due to accumulated topology and stress-induced distortions

Engineering Contradiction:
Improveinterconnection lengthVSAvoidflatness
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

A dummy die is bonded in advance on the top surface of the stacked dies before final packaging. This preliminary action compensates for the accumulated topology and stress-induced distortions that would otherwise prevent flatness, enabling the stack to achieve the required flatness for subsequent processing steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy die is designed with specific thickness parameters to compensate for the cumulative errors from stacking multiple dies. By adjusting the thickness of the dummy die, the overall flatness of the stacked structure can be controlled and optimized to meet manufacturing requirements.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multiple dies are stacked vertically to increase integration, then component density is improved, but bonding quality deteriorates due to flatness issues and void formation

Engineering Contradiction:
Improveintegration densityVSAvoidbonding quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The dummy die is bonded in advance to establish a flat bonding surface before subsequent bonding operations. This preliminary flatness correction prevents void formation and ensures high-quality bonding interfaces in the final packaging process, thereby maintaining reliability despite increased integration density.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy die acts as an intermediary element that mediates between the stacked dies and the final packaging structure. It provides a flat, stable surface that facilitates reliable bonding while allowing the underlying stacked dies to maintain their high-density configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Length of stationary object

If dies are stacked with accumulated topology, then stacking height is reduced for miniaturization, but stress-induced distortions increase affecting reliability

Engineering Contradiction:
Improvestacking heightVSAvoidstress-induced distortion
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The dummy die functions as a counterweight that compensates for the stress-induced distortions accumulated during the stacking process. By positioning and sizing the dummy die appropriately, it balances the internal stresses and prevents distortions that would compromise the reliability of the stacked structure.

Inventive Principle:
Principle #8Anti-weight (Counterweight)

Solution Approach 2:

The thickness and material properties of the dummy die are carefully selected to counteract the cumulative stresses from stacking multiple thin dies. This parameter optimization allows miniaturization while maintaining structural integrity and reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the reliability and production yield by planarizing the stack die, improving bonding quality, and ensuring thermal characteristics through the use of a gap fill insulating layer and a top dummy die, effectively addressing the flatness and distortion issues in die stacking.

Implementation Method 1

the gap fill insulating layer is formed using oxide materials and a spin-on deposition process

Methodology Applied
Scientific EffectSpin-on deposition: Spin Coating

Data Source

PatentUS20240170459A1Semiconductor package and manufacturing method of the same
Publication Date: 2024.05.23 SAMSUNG ELECTRONICS CO LTD
  • US20240170459A1 patent drawing
  • US20240170459A1 patent drawing
  • US20240170459A1 patent drawing

AI summary

A semiconductor package may include a package substrate, a stack die including a plurality of dies are stacked on the package substrate, a gap fill insulating layer on an upper surface of the stack die, a top dummy die on the gap fill insulating layer, and a molding portion surrounding the stack die having the top dummy die thereon.