Stacked Semiconductor Die Thermal Transfer Structure

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Solution Overview

Problem

Vertically-stacked semiconductor die packages face challenges in dissipating heat efficiently, leading to increased operating temperatures due to additive heat generation, which is exacerbated by die density and differing maximum operating temperatures among various dies in the stack.

Innovation Solution

The implementation of a stacked semiconductor die assembly with a thermal transfer structure (TTS) that includes a thermally conductive casing and underfill material to enhance heat dissipation, where the TTS covers a significant percentage of the peripheral region of the first die and encases the stack of second dies, providing separate thermal paths for efficient heat transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple semiconductor dies are vertically stacked to increase processing power without increasing package footprint, then the functional capacity of the package is improved, but the heat dissipation capability deteriorates due to additive heat generation from multiple dies

Engineering Contradiction:
Improveprocessing powerVSAvoidoperating temperature
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The invention segments the thermal management system into multiple independent thermal paths: (1) a first thermal path through the peripheral region of the first die to a first heat dissipation structure, (2) a second thermal path through the stack of second dies to a second heat dissipation structure, and (3) a third thermal path through the peripheral region of the second die to a third heat dissipation structure. This segmentation allows heat from different die regions to be dissipated independently, preventing thermal accumulation and enabling higher processing power without excessive temperature rise.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from conventional two-dimensional heat dissipation (single plane) to three-dimensional heat dissipation by implementing heat dissipation structures at multiple vertical levels and positions. The first heat dissipation structure is coupled to the peripheral region of the first die, the second heat dissipation structure to the stack of second dies, and the third heat dissipation structure to the peripheral region of the second die, creating a multi-dimensional thermal management architecture that efficiently removes heat from stacked dies.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the density of dies in the package is increased to meet operating parameters, then the functional capacity is improved, but the heat dissipation capability deteriorates further due to reduced spacing between dies

Engineering Contradiction:
Improvefunctional capacityVSAvoidoperating temperature
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The thermal management system is segmented into multiple independent thermal paths that can handle heat from high-density die arrangements. Each die or die stack has its dedicated heat dissipation structure and thermal path, preventing thermal interference between adjacent high-density dies and enabling higher die density without compromising heat dissipation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Heat dissipation structures serve as intermediary elements between the high-density stacked dies and the external environment. These structures are thermally coupled to specific regions (peripheral regions or die stacks) and provide intermediate heat transfer, facilitating efficient heat removal from densely packed dies without requiring increased spacing between them.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If devices with different types of dies are stacked in a hybrid memory cube configuration, then the functional versatility is improved, but the maximum operating temperature is limited by the die with the lowest maximum operating temperature

Engineering Contradiction:
Improvefunctional versatilityVSAvoidmaximum operating temperature
Core Design Contradiction:
Adaptability or versatilityVSTemperature

Solution Approach 1:

The thermal management system is segmented into dedicated thermal paths for different die types in the hybrid memory cube. Each die type (e.g., logic die, memory dies) has its own heat dissipation structure and thermal path, allowing each die to operate at its optimal temperature independent of other die types. This enables the package to achieve higher overall operating temperatures and power levels compared to conventional unified thermal management approaches.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively lowers the operating temperatures of individual dies, ensuring they remain below their maximum temperatures, even in hybrid memory cube configurations with varying power levels, by efficiently removing heat from the peripheral region of the first die and the stack of memory dies.

Implementation Method 1

a thermal transfer structure (TTS) that includes a thermally conductive casing and underfill material to enhance heat dissipation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP3170198B1Stacked semiconductor die assemblies with high efficiency thermal paths and associated systems
Publication Date: 2022.11.16 MICRON TECHNOLOGY INC
  • EP3170198B1 patent drawingFigure 1
  • EP3170198B1 patent drawingFigure 2A
  • EP3170198B1 patent drawingFigure 2B

AI summary

A semiconductor die assembly having high efficiency thermal paths. In one embodiment, the semiconductor die assembly comprises a package support substrate, a first semiconductor die having a peripheral region and a stacking region, and a second semiconductor die attached to the stacking region of the first die such that the peripheral region is lateral of the second die. The assembly further includes a thermal transfer unit having a base attached to the peripheral region of the first die, a cover attached to the base by an adhesive, and a cavity defined by at least cover, wherein the second die is within the cavity. The assembly also includes an underfill in the cavity, wherein a fillet portion of the underfill extends a distance up along a portion of the footing and upward along at least a portion of the base.