Stacked Semiconductor Die Via Delay Measurement Using Ring Oscillators

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Solution Overview

Problem

The high degree of interconnectivity in modern semiconductor devices necessitates accurate determination of signal delay characteristics between stacked semiconductor dies to improve reliability and integration.

Innovation Solution

Incorporation of ring oscillators in semiconductor devices to generate reference and test clock signals, allowing for the detection of frequency and phase differences to measure signal delay characteristics accurately.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If signal transmission paths are established between stacked semiconductor dies through via structures, then interconnectivity and integration are improved, but signal delay characteristics become difficult to accurately determine

Engineering Contradiction:
Improvereliability of semiconductor deviceVSAvoidaccuracy of signal delay determination
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent changes the measurement parameter from direct time-domain delay measurement to frequency-domain oscillation frequency measurement. By measuring the oscillation frequency of ring oscillators that include the via structures, the signal delay characteristics can be accurately determined through frequency calculations, resolving the difficulty of direct delay measurement in stacked die configurations.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces ring oscillators as intermediary measurement structures that incorporate the via structures. These ring oscillators serve as mediators that convert the hard-to-measure signal delay into easily measurable oscillation frequencies, enabling accurate characterization of signal transmission paths between stacked semiconductor dies.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If ring oscillators are introduced to measure signal delay, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveaccuracy of signal delay measurementVSAvoidcomplexity of measurement structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The ring oscillators serve multiple functions: they are part of the normal circuit operation and simultaneously function as measurement structures for characterizing via structures. This multi-functionality reduces the need for separate dedicated test structures, thereby minimizing the increase in device complexity while achieving accurate signal delay measurement.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the measurement function with the existing circuit elements by incorporating via structures into ring oscillator circuits. This combination allows the measurement of signal delay characteristics without requiring completely separate measurement apparatus, thus improving measurement precision while controlling device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250286017A1Semiconductor device
Publication Date: 2025.09.11 SAMSUNG ELECTRONICS CO LTD
  • US20250286017A1 patent drawing
  • US20250286017A1 patent drawing
  • US20250286017A1 patent drawing

AI summary

A semiconductor device includes a lower semiconductor die including a plurality of lower elements, a lower interconnection region, and a plurality of lower via structures, and an upper semiconductor die including a plurality of upper elements, and an upper interconnection region, the upper semiconductor die stacked on the lower semiconductor die in one direction. Some lower elements, among the plurality of lower elements, and some upper elements, among the plurality of upper elements, provide a first ring oscillator outputting a reference clock signal generated through a signal transmission path including first via structures that are some lower via structures, among the plurality of lower via structures, and a second ring oscillator outputting a test clock signal generated through a signal transmission path including second via structures different from the first via structures, among the plurality of via structures.