Stacked Semiconductor Devices With Dissimilar Dies And Heat Dissipating Layer
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Solution Overview
Problem
Current methods for manufacturing stacked semiconductor devices are inefficient when dealing with dissimilar-sized dies and wafers, particularly due to particle contamination from the wafer singulation process and the need for matching die sizes in wafer-to-wafer stacking, which limits throughput and bonding strength.
Innovation Solution
The method involves creating a stacked semiconductor device with a first die and a second die of different sizes, where the second die is bonded using a dielectric material and surrounded by a heat dissipating layer, allowing for efficient wafer-to-wafer stacking by using a window wafer with mold compound spacers to form a reconstructed wafer that can be easily cleaned and bonded, eliminating the need for matching die sizes and reducing particle contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wafer-to-wafer stacking is used, then manufacturing efficiency is improved, but die sizes must be equal which limits flexibility
Solution Approach 1:
The patent segments the wafer structure by introducing window openings in the first wafer that define specific regions. Dies of different sizes can be placed in these segmented regions, allowing the wafer to accommodate dissimilar-sized dies while maintaining wafer-to-wafer stacking efficiency. The window openings create distinct placement zones that accommodate various die dimensions.
Solution Approach 2:
The patent applies local quality by creating window spacers at specific locations around the window openings. These spacers provide localized structural support and heat dissipation exactly where needed around each die placement region, rather than requiring uniform structures across the entire wafer. This allows dissimilar-sized dies to be accommodated with locally-adapted support structures.
2Adaptability or versatility
If wafer singulation process is used to obtain dies, then dissimilar-sized dies can be obtained, but particle contamination weakens bonding
Solution Approach 1:
The patent performs preliminary cleaning of the wafer surfaces before the bonding process. By cleaning the wafers in advance to remove particles from the singulation process, the bonding interface is prepared in a clean state, ensuring strong bonding strength while still allowing the use of dies obtained through singulation processes.
Solution Approach 2:
The patent introduces a dielectric material as an intermediary bonding layer between the dies and wafers. This dielectric material serves as a mediator that provides strong bonding while being less sensitive to particle contamination, thus maintaining bonding strength even when dies are obtained through singulation processes that may introduce particles.
3Adaptability or versatility
If smaller second die is used in stacked device, then design flexibility is improved, but heat dissipation becomes more challenging
Solution Approach 1:
The patent applies local quality by placing heat dissipating layers specifically around the smaller second die in the stacked structure. These localized heat dissipation structures are positioned exactly where thermal management is needed, providing effective cooling for the smaller die without requiring the entire device structure to be optimized for heat dissipation.
Solution Approach 2:
The patent employs asymmetry by creating window spacers and heat dissipating structures that are specifically sized and positioned to match the smaller second die. The heat dissipation structures are asymmetric in their distribution, with more concentrated dissipation capability around the smaller die where it is most needed, rather than uniform distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient and straightforward wafer-to-wafer stacking with improved bonding strength and reduced particle contamination, allowing for the use of dissimilar-sized dies and wafers while maintaining high manufacturing yield and flexibility in die selection.
Implementation Method 1
The second die is bonded to the first die using a dielectric material
Implementation Method 2
the heat dissipating layer is surrounding the second die
Data Source
AI summary
A stacked semiconductor device is provided, which includes a first die, a second die and a heat dissipating layer. The first die has a pre-determined size. The second die is bonded to the first die using a dielectric material, wherein the second die is smaller than the first die. The heat dissipating layer is surrounding the second die, wherein the heat dissipating layer has an outer dimension that is equal to the size of the first die.