Stacked Display Circuit Neural Network Processing
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Solution Overview
Problem
Display apparatuses for augmented and virtual reality, such as head-mounted displays, face challenges in providing high-resolution, high-quality images with high pixel density due to perceived pixel granularity, leading to diminished immersion and realism.
Innovation Solution
A display apparatus with stacked layers, including a data driver circuit, arithmetic circuit, and memory circuit, where a neural network is configured to perform image processing, increasing pixel density and resolution, and overlapping regions to enhance image quality and reduce bezel size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixel density is increased to reduce perceived granularity, then image quality and immersion are improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent transitions from planar 2D pixel arrangements to a 3D stacked micro-display architecture with multiple layers (light source layer, microlens array layer, color filter layer, etc.), enabling high pixel density through vertical stacking rather than horizontal expansion, thus achieving 4K/8K resolution without proportionally increasing device footprint or complexity
Solution Approach 2:
The patent employs nested functional layers where each layer is positioned within or above the previous layer (light source layer nested with microlens array, which is nested with color filter layer, etc.), creating a compact vertical integration that achieves high pixel density while minimizing lateral space requirements and overall device complexity
2Measurement precision
If pixel density is increased to achieve high resolution, then image quality is improved, but manufacturing precision requirements increase
Solution Approach 1:
By moving to 3D stacked architecture, the patent achieves high pixel density through vertical layering where each layer can be manufactured and tested independently before assembly, reducing the need for ultra-precise single-step manufacturing and allowing modular fabrication processes
Solution Approach 2:
The display device is divided into multiple functional layers (light source layer, microlens array layer, color filter layer, etc.) that can be manufactured, tested, and assembled separately, reducing manufacturing precision requirements for each individual layer while achieving high overall pixel density through precise layer alignment
3Measurement precision
If more pixels are provided to display high-resolution images, then image quality is improved, but device size increases
Solution Approach 1:
The patent achieves high pixel density by stacking multiple functional layers vertically, allowing 4K/8K resolution in a compact form factor suitable for wearable devices, thereby increasing pixel density without proportionally increasing device area
Solution Approach 2:
Multiple functional layers are nested vertically within a compact space, with each layer contributing to the overall pixel density without requiring lateral expansion, thus achieving high-resolution display in a small wearable device footprint
4Measurement precision
If a large number of pixels are provided for high resolution, then image quality is improved, but power consumption increases
Solution Approach 1:
The patent employs time-sequential color rendering where red, green, and blue sub-pixels are driven alternately at high frequency, allowing each pixel to be driven less frequently than traditional simultaneous RGB driving, thereby reducing overall power consumption while maintaining high pixel density and image quality
Solution Approach 2:
The use of thin-film light sources (OLED or EL) and thin-film transistors in the stacked architecture reduces the active area and parasitic capacitance per pixel, lowering power consumption while achieving high pixel density suitable for wearable applications
Data Source
AI summary
A display apparatus that can display a high-resolution image can be provided. In the display apparatus, a first layer and a second layer are stacked. In the first layer, an arithmetic circuit and a data driver circuit and are provided, and in the second layer, a display portion is provided. In the arithmetic circuit, a neural network is configured. The display portion has a region overlapping with the data driver circuit. The arithmetic circuit has a function of performing arithmetic processing using the neural network on image data and supplying the arithmetically-processed image data to the data driver circuit.