Stacked DRAM Cell Layout to Separate Bit Lines and Capacitors
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Solution Overview
Problem
The manufacturing process of semiconductor devices, such as DRAM, is complicated due to the crowding of bit lines and capacitors on the same side of word lines, increasing difficulty and reducing device density.
Innovation Solution
A semiconductor structure and manufacturing method where word lines cover opposite sides of active areas, and bit lines are located on a separate base, allowing for independent formation and reducing overcrowding, with charge storage structures connected to the first ends of active areas and bit lines connected to the second ends, facilitating easier manufacturing and improved stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bit lines and capacitors are located on the same side of word lines in the DRAM structure, then the manufacturing process follows the conventional sequence, but the space on the same side of the word lines becomes crowded, increasing the difficulty of manufacturing bit lines and capacitors
Solution Approach 1:
The patent divides the semiconductor device into two separate bases: a first base containing word lines and active areas, and a second base containing bit lines. This segmentation separates the previously crowded components into distinct spatial locations, eliminating the space crowding issue and simplifying the manufacturing process by allowing independent formation of bit lines and charge storage structures.
Solution Approach 2:
The patent transitions from a two-dimensional planar arrangement where bit lines and capacitors share the same side of word lines to a three-dimensional stacked architecture with two separate bases. The first base contains word lines and active areas while the second base contains bit lines, utilizing the vertical dimension to resolve the spatial crowding problem.
2Volume of moving object
If bit lines and capacitors are formed on the same base, then the structure is more compact, but the manufacturing process becomes more difficult due to space constraints
Solution Approach 1:
The patent segments the device into two separate bases to resolve the contradiction between compactness and manufacturability. The first base contains word lines and active areas while the second base contains bit lines, allowing each component to be formed independently without space constraints, while the stacked architecture maintains overall device compactness.
Solution Approach 2:
The patent uses vertical stacking of two bases to achieve compactness in the vertical dimension while providing sufficient horizontal space on each base for easy manufacturing. This dimensional transition allows bit lines to be formed on the second base without interfering with word line formation on the first base.
3Reliability
If word lines cover opposite sides of active areas, then charge storage can be improved, but the manufacturing process complexity increases due to the need to form structures on both sides
Solution Approach 1:
The patent segments the charge storage function across two separate bases: the first base contains active areas with word lines covering opposite sides for charge storage, while the second base contains bit lines for read/write operations. This segmentation allows the charge storage structure to achieve improved reliability without excessive manufacturing complexity, as each base can be processed independently.
Data Source
AI summary
A method for manufacturing a semiconductor structure includes: forming first base which includes first substrate and active areas arranged in an array along first direction and second direction in first substrate, word lines being disposed in first base, extending along second direction and covering at least opposite sides of each active area; forming charge storage structures electrically connected with first ends of active areas on first base; forming second base which includes second substrate and bit lines disposed in second substrate, bit lines extending along first direction; connecting first base and second base by using a first surface of first base away from charge storage structures and a second surface of second base having structures of bit lines as connection surfaces, bit lines being electrically connected with second ends of active areas, and each first end being disposed opposite to a corresponding second end.