Stacked Horizontal DRAM Capacitors to Reduce Bridging and Leakage
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Solution Overview
Problem
Conventional DRAM capacitors face challenges in structural stability and increased susceptibility to bridging and leakage due to their high aspect ratio and reduced size, which affects integration density and operational reliability.
Innovation Solution
The implementation of stacked horizontal capacitor structures with fin structures and conductive lines aligned in specific directions, allowing for improved density and reduced bridging and leakage by using conductive materials and dielectric layers in a unique configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the lateral footprint of DRAM capacitors is reduced by increasing aspect ratio and decreasing proximity, then integration density is improved, but structural stability deteriorates causing containers to topple or break
Solution Approach 1:
The patent transitions from conventional vertical capacitor structures to horizontally stacked capacitor structures. The capacitors are arranged in multiple horizontal tiers stacked vertically, with each tier containing capacitors extending in the first horizontal direction and connected by conductive regions in the second horizontal direction. This dimensional reconfiguration reduces the aspect ratio of individual capacitors while maintaining high integration density through the stacked arrangement.
Solution Approach 2:
The capacitor structure is segmented into multiple horizontal tiers, with each tier containing individual capacitors that can be independently formed. The conductive regions connecting capacitors within a tier are separated from inter-tier connections, allowing for modular fabrication and reduced mechanical stress on any single capacitor structure.
2Strength
If retaining structures are used to strengthen vertically oriented containers, then structural stability is improved, but fabrication process complexity increases
Solution Approach 1:
Instead of adding retaining structures to support vertical containers, the patent inverts the conventional approach by orienting capacitors horizontally. The capacitors extend in the first horizontal direction and are connected by conductive regions in the second horizontal direction, eliminating the need for lateral support structures while maintaining structural integrity through the horizontal configuration.
3Productivity
If capacitor size is decreased to increase integration density, then productivity is improved, but susceptibility to bridging and leakage increases
Solution Approach 1:
The stacked horizontal configuration separates capacitors in the vertical direction through multiple tiers, increasing the distance between adjacent capacitors compared to lateral arrangements. This vertical separation reduces coupling capacitance and susceptibility to bridging while maintaining high integration density through the multi-tier stacking.
Solution Approach 2:
Dielectric materials are used as intermediaries between adjacent capacitors both within a tier and between tiers. The dielectric regions completely surround the capacitor structures, providing electrical isolation and reducing leakage paths while allowing capacitors to be positioned in close proximity for high density.
Data Source
AI summary
An apparatus includes fin structures comprising individual levels of a conductive material having elongated portions extending in a first horizontal direction, first conductive lines extending in a second horizontal direction transverse to the first horizontal direction, and second conductive lines extending in a vertical direction transverse to each of the first horizontal direction and the second horizontal direction. At least portions of the first conductive lines are aligned vertically. The apparatus also includes horizontal capacitor structures comprising the conductive material of the fin structures and access devices proximate intersections of the first conductive lines and the second conductive lines. The access devices comprise the conductive material of the fin structures. Memory devices, electronic systems, and methods of forming the apparatus are also disclosed.