Stacked Dual-Die Semiconductor Package Design
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Solution Overview
Problem
The increasing functionality of portable electronic devices conflicts with their decreasing size, as higher functionality requires more component count and wiring, which cannot be accommodated without increasing the physical size of the device.
Innovation Solution
A semiconductor die package is designed to stack two semiconductor dice in a single package with the back surfaces facing each other, using a conductive adhesive and conductive structures to make electrical connections, along with thermally-conductive vertical paths and a ground plane for heat removal and shielding, allowing for increased functionality without size increase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If more component count and wiring are added to increase functionality, then device functionality is improved, but device size increases
Solution Approach 1:
The patent transitions from a planar arrangement of components to a three-dimensional stacked configuration. Multiple semiconductor dice are vertically stacked and interconnected through conductive structures that pass through intermediate substrates, enabling increased functionality without increasing the lateral footprint of the device package.
Solution Approach 2:
The patent implements a nested structure where semiconductor dice are stacked one upon another, with each die containing circuitry and being interconnected through conductive structures. The intermediate substrate is nested within the stack, providing mechanical support and electrical interconnection pathways between the dice, effectively nesting multiple functional layers within a compact volume.
2Adaptability or versatility
If signal-processing and power-control circuitries are segregated onto separate semiconductor dice, then functional integration is improved, but package size increases
Solution Approach 1:
The patent resolves this contradiction by stacking semiconductor dice vertically rather than arranging them side-by-side in a planar configuration. The signal-processing and power-control circuitries are implemented on separate dice that are vertically integrated through conductive structures, maintaining functional segregation while minimizing package area through the third dimension.
3Reliability
If analog and digital circuitries are segregated onto separate semiconductor dice, then signal integrity is improved, but component count increases
Solution Approach 1:
The patent merges multiple functional requirements into a single integrated package structure. While analog and digital circuitries remain segregated on separate dice for signal integrity, the conductive structures and intermediate substrate provide unified mechanical support and electrical interconnection, effectively combining multiple functions (segregation, support, interconnection) into a single integrated solution rather than requiring separate components for each function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables the integration of signal-processing and power-control circuitries in a smaller space, enhancing device functionality without increasing the package size, while also providing effective heat removal and electrical shielding.
Implementation Method 1
a conductive adhesive disposed between the first semiconductor die and the first surface of the substrate
Implementation Method 2
one or more thermally-conductive vertical paths (e.g., 'thermal vias') may be incorporated into the substrate and thermally coupled to one or more thermal pads on the first die to increase heat removal from the package
Implementation Method 3
a ground plane may be incorporated into the substrate, and optionally coupled to a ground plane on the first die, to provide electrical shielding for the first die
Data Source
AI summary
A semiconductor die package. It includes a substrate having a first surface and a second surface, a first semiconductor die having its front surface facing the first surface of the substrate, a conductive adhesive disposed between the first semiconductor die and the first surface of the substrate, and a second semiconductor die located on the first semiconductor die. The front surface of second semiconductor die faces away from the first semiconductor die, and the back surface faces toward the first semiconductor die. A plurality of conductive structures electrically couple regions at the front surface of the second semiconductor die to conductive regions at the first surface of the substrate.