Stacked Dual-Gate TFT Layout for LED Pixel Drive Simplification
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Solution Overview
Problem
The fabrication of dual transistor configuration drive circuitry for LED-based pixels is complex and involves additional fabrication steps with multiple masks, increasing costs and complexity.
Innovation Solution
A dual-gate device is introduced, comprising a first and second gate structure with varying dielectric constants and semiconductor layers, allowing for a simplified fabrication process by stacking TFTs, reducing the number of masks required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a dual transistor configuration is used for LED-based pixel drive circuitry, then switching and brightness control functions are achieved, but fabrication complexity increases with additional masks and steps
Solution Approach 1:
The patent combines two separate thin film transistors (switching TFT and driving TFT) into a single integrated dual-gate TFT device. The first gate structure serves as the switching gate while the second gate structure serves as the driving gate, both controlling the same semiconductor channel. This merging eliminates the need for separate transistor fabrication steps and masks, reducing fabrication complexity while maintaining the dual-functionality of switching and brightness control.
Solution Approach 2:
The integrated dual-gate TFT structure performs multiple functions within a single device: the first gate structure provides switching control (turning the pixel on/off) while the second gate structure provides driving control (controlling brightness intensity). This multi-functional design allows one device to replace what would traditionally require two separate transistors, simplifying the overall pixel circuitry and fabrication process.
2Manufacturing precision
If multiple masks are used in fabrication, then precise transistor patterning is achieved, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent employs a unified patterning process where a single mask defines both the first gate structure and the second gate structure simultaneously. The mask pattern is transferred to both gate electrodes in one photolithography step, eliminating the need for multiple separate masking and etching steps that would traditionally be required to fabricate two distinct transistors. This approach maintains precise patterning while significantly reducing manufacturing complexity and cost.
3Adaptability or versatility
If separate switching and driving transistors are used, then pixel control performance is optimized, but device area increases
Solution Approach 1:
The patent merges the switching TFT and driving TFT into a single vertical stack structure where the first gate structure and second gate structure are positioned at different heights along the same semiconductor channel. This three-dimensional integration allows both control functions to be achieved within a compact footprint, significantly reducing the horizontal area occupied compared to lateral placement of separate transistors.
Solution Approach 2:
The patent transitions from a planar two-transistor layout to a vertical stacked configuration. By utilizing the vertical dimension with the first gate structure positioned above or beside the second gate structure, both transistors share the same semiconductor channel footprint. This dimensional change enables compact integration while maintaining the independent control capabilities of both switching and driving functions.
Data Source
AI summary
A dual-gate device can control display pixels, such as LED-based pixels. The dual-gate device can include two thin-film transistors (TFTs). A first TFT or top gate structure can be deposited directly on a second TFT or bottom gate structure. The first TFT can include a first conducting layer, a first gate insulator, and a semiconductor structure. The semiconductor structure can include a source and a drain. The second TFT can include the semiconductor structure, a second gate insulator, and a second conducting layer. By stacking the first TFT on top of the second TFT, a fabrication process can involve fewer masks and less expense than processes that involve forming the two TFTs separately or on separate portions of a substrate.


