Stacked Electronics Package With Multi-Thickness Conductor Layers
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Solution Overview
Problem
Existing electronics packaging technologies face challenges in miniaturization, design flexibility, and cost efficiency due to the inclusion of multiple routing layers, which result in increased thickness and weakened electrical performance, particularly in high-performance applications.
Innovation Solution
The implementation of a multi-thickness conductor layer with varying thicknesses and routing densities on an insulating substrate, allowing for a stacked arrangement of semiconductor devices with high current carrying and high density routing capabilities, reducing conductor length and improving signal fidelity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple routing layers are included to connect electrical components, then electrical connectivity is improved, but package thickness increases and electrical performance weakens
Solution Approach 1:
The patent transitions from planar routing (2D) to three-dimensional stacked architecture (3D), where conductor layers are positioned on opposite surfaces of the substrate and connected through vias. This dimensional change enables direct vertical interconnection between stacked electrical components, eliminating the need for multiple horizontal routing layers and significantly reducing package thickness while maintaining electrical connectivity.
Solution Approach 2:
The conductor system is segmented into distinct first and second conductor layers positioned on opposite surfaces of the substrate, rather than using a single continuous multi-layer routing structure. This segmentation allows each conductor layer to be optimized independently for its specific routing needs, reducing overall package thickness while maintaining necessary electrical connections.
2Adaptability or versatility
If multiple routing layers are used to achieve high density routing, then routing capability is improved, but conductor length increases and signal fidelity deteriorates
Solution Approach 1:
By moving from horizontal routing in multiple layers to vertical routing through vias connecting opposite surfaces, the patent dramatically shortens conductor length. The direct vertical path through the substrate eliminates the long horizontal traces required in multi-layer routing, improving signal fidelity while maintaining routing density through the stacked component architecture.
3Adaptability or versatility
If conventional packaging is used for different types of semiconductor devices, then device integration is achieved, but miniaturization is limited due to uniform routing requirements
Solution Approach 1:
The patent applies different conductor layer configurations to different regions of the substrate based on local requirements. Power devices connected to the first conductor layer can have thick, low-density routing for high current carrying capacity, while devices connected to the second conductor layer can have thin, high-density routing for compact integration. This local optimization enables miniaturization while accommodating diverse device types with different routing needs.
Solution Approach 2:
The conductor system is divided into separate first and second conductor layers that can be independently optimized for different device types. This segmentation allows power devices to use one conductor layer configuration while digital devices use another, enabling heterogeneous integration in a compact stacked package without compromising miniaturization.
Data Source
AI summary
An electronics package includes an insulating substrate, a first electrical component coupled to a bottom surface of the insulating substrate, and a first conductor layer formed adjacent the bottom surface of the insulating substrate. The electronics package also includes a second conductor layer formed on a top surface of the insulating substrate and extending through a plurality of vias in the insulating substrate to electrically couple with the first electrical component and the first conductor layer. A second electrical component is electrically coupled to the first conductor layer and the first electrical component and the second electrical component are positioned in a stacked arrangement.