Stacked Photoelectric Sensor Protection Circuits for ESD Reliability
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Solution Overview
Problem
The operation reliability of photoelectric conversion apparatuses is compromised due to electrostatic noise and damage to internal circuits when protection circuits are placed in regions overlapping pads, leading to increased chip area and reduced electrostatic protection effectiveness.
Innovation Solution
A photoelectric conversion apparatus is designed with a laminated structure of two semiconductor substrates, where a first protection circuit is placed on one substrate and a second protection circuit is placed on the other, both connected to the pad but positioned outside the pad's region in planar view, thereby increasing the electrostatic protection area without increasing the chip area and minimizing the impact of wire bonding pressure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the protection circuit is arranged in the region overlapping the pad in planar view, then the area of the protection circuit is increased, but the characteristics of the protection circuit change due to pressure from wire bonding
Solution Approach 1:
The patent extends the protection circuit from a single-plane (2D) layout to a multi-layer (3D) configuration by placing protection circuits on both the first semiconductor substrate and the second semiconductor substrate. This dimensional transition allows the protection circuit area to be increased without concentrating all protection elements in the pad region, thereby reducing the impact of wire bonding pressure on any single protection circuit while maintaining overall electrostatic protection capability.
Solution Approach 2:
The protection circuit is divided into multiple segments distributed across different substrates. Specifically, a first protection circuit is provided on the first semiconductor substrate and a second protection circuit is provided on the second semiconductor substrate. This segmentation distributes the electrostatic protection function across multiple locations, reducing the vulnerability of any single protection circuit to pressure-induced characteristic changes from wire bonding.
2Reliability
If the area of the protection circuit is increased, then the electrostatic protection capability is improved, but the chip area increases
Solution Approach 1:
The patent utilizes the vertical dimension by stacking semiconductor substrates to increase the protection circuit area. By placing protection circuits on both the first and second substrates, the total protection circuit area is effectively doubled without increasing the planar chip footprint. This multi-layer approach allows enhanced electrostatic protection capability while maintaining a compact chip area.
3Power
If the gate oxide film is made thinner, then the voltage at which dielectric breakdown occurs is reduced, but the susceptibility to electrostatic discharge increases
Solution Approach 1:
The patent implements protection circuits that act as preventive measures against electrostatic discharge before it can reach and damage the thin gate oxide films. These protection circuits are positioned to intercept and dissipate electrostatic charges that might otherwise cause dielectric breakdown, providing a cushioning effect that protects the low-voltage circuitry from high-voltage electrostatic events.
Data Source
AI summary
A photoelectric conversion apparatus includes a pad, a first protection circuit provided on a first semiconductor substrate, and a second protection circuit provided on a second semiconductor substrate. The first semiconductor substrate, which includes a plurality of photoelectric conversion units each receiving incident light and generating signal charge, and the second semiconductor substrate, which includes at least one signal processing circuit that processes an input signal based on the generated signal charge, are laminated. The pad receives a power supply voltage as input from an outside of the photoelectric conversion apparatus. At least one of the first protection circuit or the second protection circuit is provided on an outside of a region in which the pad is provided, in planar view. At least one of the first protection circuit or the second protection circuit is connected to the pad.