Stacked Ferroelectric Capacitor Structure for Compact Multi-Bit Memory
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Solution Overview
Problem
Integrated circuit devices face challenges in maintaining desired electrical characteristics due to spatial and design rule limitations as the area of unit cells decreases, requiring a capacitor structure that can improve capacitance while maintaining multi-bit status in a compact form.
Innovation Solution
The integration of a dielectric layer structure with alternately stacked ferroelectric and anti-ferroelectric materials, where the distribution proportion of internal defect dipoles varies in the thickness direction, allowing for a stepwise variation in the dielectric characteristic curve when voltage is applied, enabling a multi-bit status.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the area of unit cells decreases due to increased degree of integration, then more units can be packed in the same area, but the capacitance of capacitors becomes insufficient
Solution Approach 1:
The patent employs a composite dielectric layer structure comprising alternating ferroelectric layers and anti-ferroelectric layers. The ferroelectric layers provide high dielectric constant for capacitance enhancement, while the anti-ferroelectric layers contribute to stability and prevent leakage. This composite structure enables the capacitor to maintain desired capacitance values even as unit cell area decreases due to increased integration density.
2Productivity
If the area of unit cells decreases, then integration density increases, but the spatial room for capacitor structure becomes limited
Solution Approach 1:
The patent transitions from planar capacitor structures to vertically stacked three-dimensional capacitor structures. By stacking multiple dielectric layers in the vertical direction rather than expanding horizontally, the capacitor achieves sufficient capacitance within a reduced footprint area, thereby accommodating higher integration density without sacrificing capacitor performance.
Solution Approach 2:
The dielectric layer is segmented into multiple thin alternating layers of ferroelectric and anti-ferroelectric materials. This segmentation allows each layer to contribute to the overall capacitance while maintaining a compact total thickness, enabling the capacitor to fit within smaller unit cell areas required for high integration density.
3Quantity of substance
If a multi-bit status is required in a compact form, then memory capacity increases, but the capacitor structure becomes more complex
Solution Approach 1:
The patent utilizes the gradual variation in distribution proportion of internal defect dipoles within the dielectric layer structure to create distinct polarization states. By controlling the concentration and distribution of defect dipoles, the capacitor can represent multiple bit states (multi-bit status) through different polarization levels, thereby increasing memory capacity without requiring proportionally more complex structural arrangements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach efficiently enhances capacitance and maintains desired electrical characteristics, enabling a multi-bit status in a compact form, suitable for advanced memory devices.
Implementation Method 1
The plurality of first dielectric layers may include a ferroelectric material
Implementation Method 2
The plurality of second dielectric layers may include an anti-ferroelectric material
Implementation Method 3
when voltage is applied to vary a built-in electric field, a multi-bit status may be realized in a dielectric characteristic curve
Data Source
AI summary
An integrated circuit device may include a transistor on a substrate and a capacitor structure electrically connected to the transistor. The capacitor structure may include a first electrode, a dielectric layer structure on the first electrode, and a second electrode on the dielectric layer structure. The dielectric layer structure may include a plurality of first dielectric layers and a plurality of second dielectric layers that are alternately stacked. The plurality of first dielectric layers may include a ferroelectric material, and the plurality of second dielectric layers may include an anti-ferroelectric material. The distribution proportion of internal defect dipoles gradually may vary in a thickness direction of the dielectric layer structure.