Stacked FET Angled Contacts for Congestion-Free S/D Routing
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Solution Overview
Problem
Connecting the top source/drain epitaxy of a stacked field effect transistor (FET) to the bottom source/drain epitaxy of the same or neighboring cell is challenging due to front-end-of-line/middle-of-line congestion, leading to risks of shorts and inefficiencies in vertical and horizontal connections.
Innovation Solution
The implementation of angled contacts in stacked FETs, where the contacts are angled in opposite directions to form an hourglass shape, reducing the risk of shorts by maintaining a safe distance from the epitaxy, and allowing for compact structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vertical contacts are used to connect top and bottom source/drain epitaxy, then connectivity is achieved, but the risk of shorts increases due to congestion with proximal epitaxy
Solution Approach 1:
The contact structure transitions from a vertical orientation to an angled orientation, changing the dimensional approach of the contact. This angular dimension allows the contact to bypass proximal epitaxy regions that would otherwise be in the direct path of a vertical contact, reducing short risk while maintaining connectivity between top and bottom source/drain epitaxy
Solution Approach 2:
The contact is designed with asymmetric angular orientations rather than symmetric vertical alignment. By angling the contact in specific directions, the structure creates asymmetric pathways that avoid congested regions with proximal epitaxy, thereby reducing the risk of shorts while achieving the necessary electrical connection
2Reliability
If angled contacts are implemented to reduce short risk, then reliability improves, but manufacturing complexity increases
Solution Approach 1:
Mandrel structures are formed beforehand to define and guide the angled contact openings. These preliminary mandrels establish the correct angular geometry before the actual contact formation process, making the subsequent angled etching and metallization steps more straightforward and controllable, thus reducing manufacturing complexity despite the angled geometry
3Area of moving object
If horizontal space is optimized for compact structures, then device density increases, but connection routing becomes more difficult
Solution Approach 1:
Instead of routing contacts strictly vertically or horizontally, the invention utilizes angled pathways that diagonal through the device structure. This dimensional change in routing approach allows contacts to connect top and bottom epitaxy regions while navigating around proximal epitaxy, achieving compact horizontal footprints without excessive routing complexity
Data Source
AI summary
A semiconductor device fabrication method is provided and includes fabricating a bottom field effect transistor (FET) with bottom source/drain (S/D) epitaxy on a substrate, fabricating a top FET with top S/D epitaxy over the bottom FET to form a stacked FET, surrounding the stacked FET with dielectric material, angled etching through at least the dielectric material to form an angled contact opening from the bottom S/D epitaxy and executing contact metallization to form, in the angled contact opening, an angled contact extending from the bottom S/D epitaxy.


