Stacked FET Backside Metal Gate Layout for Threshold Control
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Solution Overview
Problem
Stacked field effect transistors (FETs) face spatial and electrical constraints due to transistors being positioned above one another, making it challenging to provide required performance, especially when forming paired devices like complementary semiconductor devices with opposing polarity.
Innovation Solution
A semiconductor device with a stacked transistor structure featuring top and bottom field effect transistors, where the bottom gate structures have backside replacement metal gates (RMGs) accessible from the backside, and work function setting metals of different types for each transistor type, allowing independent control and fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If transistors are stacked above one another to increase areal density, then device integration density is improved, but spatial and electrical constraints worsen making it challenging to provide required performance
Solution Approach 1:
The patent transitions from planar transistor arrangement to vertical stacking, utilizing the third dimension (height) to increase device integration density. Multiple transistor channels are stacked vertically above one another, allowing more devices to be packed into the same footprint area while maintaining electrical performance through careful gate structure design
2Reliability
If paired devices with opposing polarity are formed in close proximity, then device matching is improved, but gate length scaling worsens due to fabrication constraints
Solution Approach 1:
The patent segments the gate structure into separate front-gate and back-gate components, allowing independent fabrication and optimization of each gate. This segmentation enables paired devices (nFET and pFET) to be formed in close proximity with individually optimized gate lengths, improving device matching while maintaining manufacturability through separate gate formation processes
3Manufacturing precision
If backside replacement metal gates are implemented, then gate length scaling is improved, but device structure complexity worsens
Solution Approach 1:
The patent accesses the gate structure from the backside of the substrate, utilizing the opposite surface to form replacement metal gates. This backside access approach enables precise gate length definition through collimated deposition, improving manufacturing precision and gate length scaling while the segmented structure manages the increased device complexity
Data Source
AI summary
A semiconductor device includes a stacked transistor structure having top field effect transistors stacked on bottom field effect transistors. Top gate structures are associated with the top field effect transistors. Bottom gate structures have backside replacement metal gates (RMGs), which are associated with the bottom field effect transistors such that the bottom gate structures are electrically accessed from a backside of the semiconductor device.