Stacked FET Amplifier Gate Networks for RF Impedance Control
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Solution Overview
Problem
Existing stacked FET amplifiers face challenges in controlling both real and imaginary parts of impedance, particularly at higher frequencies, leading to efficiency losses, non-linear distortion, and reliability issues due to phase shifts, which are exacerbated in merged configurations where access to intermediate nodes is limited.
Innovation Solution
The implementation of series-connected resistive-capacitive networks coupled to the gates of cascode transistors in stacked FET amplifiers, allowing for the control of both real and imaginary parts of source impedance, thereby aligning current phases and enhancing amplifier performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If gate capacitors are used to control real part of source impedance in stacked FET amplifiers, then voltage distribution across transistors is improved, but imaginary part of source impedance cannot be controlled leading to phase shifts
Solution Approach 1:
The patent transforms the single-parameter control (gate capacitor for real impedance) into two-parameter control by adding series resistance to the gate capacitor. This allows independent control of both real and imaginary parts of source impedance, resolving the limitation where only real part could be controlled while imaginary part caused unwanted phase shifts.
2Area of stationary object
If merged stacked FET configuration is used to reduce device area, then area efficiency is improved, but access to intermediate nodes is limited making impedance control difficult
Solution Approach 1:
The patent extracts the impedance control function from the intermediate nodes (which are inaccessible in merged configuration) and relocates it to the gate terminals of cascode transistors. By coupling compensation networks to accessible gate terminals, the control capability is preserved despite the merged configuration eliminating intermediate node access.
3Speed
If higher frequencies are used to improve performance, then speed is improved, but phase shifts and reactance effects are exacerbated leading to efficiency losses
Solution Approach 1:
The patent applies preliminary anti-action by using compensation networks to cancel out the reactance effects and phase shifts before they degrade amplifier performance. The series RC networks are specifically designed to counteract the frequency-dependent impedance variations that worsen at higher frequencies, preventing efficiency losses rather than correcting them after they occur.
Data Source
AI summary
Methods and apparatuses for controlling impedance in intermediate nodes of a stacked FET amplifier are presented. According to one aspect, a series-connected resistive and capacitive network coupled to a gate of a cascode FET transistor of the amplifier provide control of a real part and an imaginary part of an impedance looking into a source of the transistor. According to another aspect, a second parallel-connected resistive and inductive network coupled to the first network provide further control of the real and imaginary parts of the impedance. According to another aspect, a combination of the first and/or the second networks provide control of the impedance to cancel a reactance component of the impedance. According to another aspect, such combination provides control of the real part for distribution of an RF voltage output by the amplifier across stacked FET transistors of the amplifier.