Stacked Staggered Foil Capacitors for High-Density Multi-Voltage Domains
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Solution Overview
Problem
Conventional capacitor structures are limited in electrode area efficiency and volumetric capacitive density, particularly in advanced substrate core embedding applications, and are not suitable for integrated passive devices or multiple voltage domains.
Innovation Solution
The development of stacked staggered electrode capacitors using solid conductive polymer foil-based capacitive elements with copper plating in electrode-to-terminal connections, which increases effective electrode area and volumetric capacitive density, suitable for integrated passive devices supporting multiple voltage domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional capacitor structures are used, then manufacturing simplicity is maintained, but electrode area efficiency and volumetric capacitive density are limited
Solution Approach 1:
The patent transitions from planar capacitor arrangements to a three-dimensional stacked configuration with multiple capacitor elements arranged vertically. This dimensional change enables significantly higher volumetric capacitive density by utilizing the Z-axis space, allowing multiple capacitor elements to be stacked within the same footprint area, thereby increasing the total capacitance per unit volume.
Solution Approach 2:
The patent implements a nested structure where capacitor elements are stacked within a shared housing, with each capacitor element containing an anode, cathode, and dielectric material nested together. The capacitor elements are further nested within the housing structure that provides electrical connections and mechanical support, creating a compact nested arrangement that maximizes space utilization.
2Adaptability or versatility
If conventional capacitor structures are used, then single voltage domain application is supported, but adaptability for multiple voltage domains is limited
Solution Approach 1:
The patent designs the capacitor device with multiple independently accessible capacitor elements that can be configured to serve different voltage domains. Each capacitor element can be electrically connected to different terminals, allowing the same physical structure to support multiple voltage domains simultaneously. This universal design enables a single device to replace what would traditionally require multiple separate capacitors for different voltage levels.
3Use of energy by moving object
If copper plating is applied to reduce equivalent series resistance, then power efficiency increases, but manufacturing complexity increases
Solution Approach 1:
The patent applies copper plating selectively to specific regions where electrical connections are made, rather than uniformly across all capacitor elements. The copper plating is concentrated at the terminal connection points and inter-element connection areas where resistance reduction is most critical for improving power efficiency. This localized application minimizes the additional manufacturing complexity while maximizing the benefit to power efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances power efficiency and reduces thermal load by minimizing equivalent series resistance, making it suitable for high power devices and advanced packaging substrates.
Implementation Method 1
copper plating in electrode to terminal connections reduces equivalent series resistance
Data Source
AI summary
A stacked staggered electrode capacitor in semiconductor devices and methods for fabrication. There are capacitor elements each with a cathode vertically disposed relative to an anode, an anode conductive plating on the anode and a cathode conductive plating on the anode. The anode conductive plating is in a laterally offset relationship to the cathode conductive plating. The plurality of capacitor elements are stacked onto another. One or more build-up layers are interposed between the capacitor elements. One or more anode connecting electrode segments are on a first side of the plurality of capacitor elements, and a cathode connecting electrode on an opposed second side of the plurality of capacitor elements is connected to the cathode conductive plating of each of the plurality of capacitor elements.