Stacked GAA Transistor Gate Geometry for Leakage Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving high reliability, high performance, and multiple functions due to limitations in electric characteristics of gate-all-around type transistors.
Innovation Solution
The semiconductor device incorporates a gate-all-around type transistor design with a channel pattern comprising sequentially stacked semiconductor patterns and a gate electrode with specific width configurations, allowing for improved electric characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If gate-all-around type transistor is used to increase integration density, then device complexity is reduced and manufacturing is simplified, but electric characteristics deteriorate due to leakage current
Solution Approach 1:
The gate electrode is designed with varying width along its length: wider at the first end (adjacent to substrate) and narrower at the second end. This local variation in geometry optimizes the electric field distribution specifically in different regions of the gate-all-around transistor, reducing leakage current while maintaining the simplified integrated structure.
Solution Approach 2:
The invention changes the geometric parameter of the gate electrode by making its width non-uniform along the length. The first end has a greater width than the second end, creating a tapered profile that modifies electrical characteristics and reduces leakage without requiring a fundamentally different transistor architecture.
2Reliability
If gate electrode width is increased to improve control, then electric characteristics improve, but manufacturing precision requirements increase
Solution Approach 1:
The gate electrode is segmented into regions with different widths along its length. The first end has a greater width for enhanced control in critical regions, while the second end has a narrower width. This segmentation allows optimized control where needed without requiring uniform high precision across the entire gate structure.
Solution Approach 2:
Different sections of the gate electrode have different widths tailored to local requirements. The wider first end provides better control where it is most needed (adjacent to substrate), while the narrower second end reduces manufacturing complexity in other regions.
Data Source
AI summary
A semiconductor device includes a channel pattern including a first semiconductor pattern and a second semiconductor pattern, which are sequentially stacked on a substrate, and a gate electrode that extends in a first direction and crosses the channel pattern. The gate electrode includes a first portion interposed between the substrate and the first semiconductor pattern and a second portion interposed between the first and second semiconductor patterns. A maximum width in a second direction of the first portion is greater than a maximum width in the second direction of the second portion, and a maximum length in the second direction of the second semiconductor pattern is less than a maximum length in the second direction of the first semiconductor pattern.