3D Stacked GaN HEMT Structure for Higher Current Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional GaN-based high electron mobility transistors (HEMTs) have a planar structure, leading to larger layout areas and package volumes, and lower current density per unit area, making them less suitable for high-power, small-size, and low-resistance applications.
Innovation Solution
A stacked multilayer 3D GaN HEMT structure is proposed, where multiple layers of GaN HEMT are grown on a substrate with dielectric protection layers, and electrodes are connected using deep etching and metal deposition processes, reducing layout area and increasing current density per unit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a planar structure is used for GaN HEMT, then the device is easier to manufacture, but the layout area increases and current density per unit area decreases
Solution Approach 1:
The patent transitions from a conventional planar (2D) structure to a stacked 3D structure by adding vertical layering. Multiple GaN HEMT layers are stacked vertically with each layer containing source, drain, and gate electrodes, enabling current to flow through multiple parallel channels in the vertical dimension. This dimensional change increases current density per unit area while maintaining manufacturing feasibility through sequential epitaxial growth and electrode formation processes.
2Reliability
If gate width is increased to reduce device resistance, then current carrying capacity improves, but device size increases
Solution Approach 1:
Instead of increasing gate width in the lateral direction, the patent stacks multiple HEMT layers vertically, each contributing to current carrying capacity. The effective gate width becomes the sum of gate widths across all stacked layers, achieving lower device resistance without increasing the lateral footprint of the device.
Solution Approach 2:
Multiple GaN HEMT layers are nested vertically one above another, with each layer containing complete source-drain-gate structures. The layers are interconnected through vertical electrodes that pass through dielectric layers, creating a compact nested configuration that maximizes current capacity within a small lateral area.
3Productivity
If more GaN layers are stacked to increase current density, then current density per unit area increases, but device complexity increases
Solution Approach 1:
The device is segmented into multiple identical or similar GaN HEMT layers, each functioning as an independent current channel. This segmentation allows current density to scale with the number of layers while maintaining a modular structure that simplifies design and manufacturing through repetition of standardized layers.
Solution Approach 2:
Each stacked GaN layer serves the same function as a current channel, making the structure universal and scalable. The repeated modular units can be configured in different numbers and arrangements to meet specific current density requirements without redesigning the basic layer structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The 3D structure reduces the layout area and package volume of GaN HEMT devices, enhancing current density per unit area, making them more suitable for high-power applications and reducing wafer area usage, thus lowering overall costs.
Implementation Method 1
the interface between the GaN layer 203 and the AlGaN layer 202 will form a two-dimensional electron gas (2DEG)
Implementation Method 2
The multilayered epitaxial structure from bottom to top includes a substrate 104, a n-type gallium nitride (GaN) layer 103, an aluminum gallium nitride (AlGaN) layer 102
Data Source
AI summary
A GaN HEMT with a stacked multilayer 3D structure is proposed, which is formed by re-growing a GaN layer, fabricated a second HEMT on a dielectric protective layer and connected the source, gate or drain electrodes of the respective GaN HEMT. Process is repeated to form at least three layers GaN HEMT structure, one stacked on top of the other, with each electrode of individual GaN HEMT connected by a deep etching process. Bonding pads of the HEMT device are formed on the uppermost layer of the device. The multilayer 3D GaN HEMT device will be manufactured based on stacking one layer of GaN HEMT following one layer of protection layer. In this way, the layout area of the GaN HEMT device can be reduced and the current density per unit area can be increased, thereby reducing the overall packaged volume.