Stacked-Gate Comparator Circuit with Equalized Kickback Noise
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Solution Overview
Problem
In integrated circuits, particularly in comparators with stack-gate structures, internal nodes can induce unequal kickback noise when the comparator operates, degrading performance and leading to poor signal-to-noise ratio (SNR) in analog-to-digital converters (ADCs) due to uncontrolled voltages during off-mode operations.
Innovation Solution
The introduction of a new circuit design where internal nodes of a differential pair of stack-gate transistors are connected or tied to a power-supply pin, and additional switches are used to ensure equal kickback noise generation when the comparator is turned on, allowing differential operation to cancel out this noise effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple stages of gates of transistors are stacked to form an equivalent transistor with long channel length, then input-offset and input-referred noise are reduced, but internal nodes induce unequal kickback noise that degrades comparator performance
Solution Approach 1:
The patent applies preliminary action by pre-charging internal nodes to a specific voltage level before the comparator switches to latch mode. Switches are used to connect internal nodes to power supply or ground during pre-charge phase, ensuring they start at known potentials. This preliminary voltage establishment prevents arbitrary floating voltages that cause unequal kickback noise, while maintaining the stacked-gate structure's noise reduction benefits.
2Device complexity
If internal nodes are left floating during off mode to maintain circuit simplicity, then device complexity is reduced, but uncontrolled voltages induce unequal kickback noise
Solution Approach 1:
The patent implements periodic action through cyclic switching between pre-charge and latch modes. During pre-charge phase, switches connect internal nodes to power supply or ground to establish controlled voltages. During latch phase, switches disconnect to allow normal comparator operation. This periodic re-initialization ensures internal nodes start each cycle at known potentials, preventing unequal kickback noise without requiring permanent circuit modifications.
Data Source
AI summary
Circuits and methods for reducing and cancelling out kickback noise are disclosed. In one example, a circuit for a comparator is disclosed. The circuit includes: a first transistor group, a second transistor group, and a first switch. The first transistor group comprises a first transistor having a drain coupled to a first node, and a second transistor having a source coupled to the first node. Gates of the first transistor and the second transistor are coupled together to a first input of the comparator. The second transistor group comprises a third transistor having a drain coupled to a second node, and a fourth transistor having a source coupled to the second node. Gates of the third transistor and the fourth transistor are coupled together to a second input of the comparator. The first switch is connected to and between the first node and the second node.