Stacked Gate Electrode and Data Line for Display Substrate Aperture Ratio
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Solution Overview
Problem
The increasing number of thin film transistors (TFTs) in display substrates reduces the aperture ratio due to their spatial requirements, limiting the resolution and display performance.
Innovation Solution
The display substrate design includes a configuration where the gate electrode and data lines of the TFTs are stacked perpendicular to the substrate, reducing their combined dimension and allowing for a more compact arrangement within the pixel area, thereby increasing the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of TFTs is increased to improve resolution, then the resolution is improved, but the aperture ratio is reduced
Solution Approach 1:
The gate electrode and data line are arranged in a stacked configuration along the vertical direction (thickness direction of the substrate) rather than being arranged side-by-side in the planar direction. This dimensional transition from 2D planar arrangement to 3D stacked arrangement reduces the horizontal space occupied by TFT components, allowing more TFTs to be packed into the same pixel area while maintaining or increasing the aperture ratio.
2Ease of manufacture
If the gate electrode and data line are arranged side by side, then the manufacturing process is simple, but the occupied space is large reducing aperture ratio
Solution Approach 1:
The invention transitions from a planar side-by-side arrangement to a vertical stacked arrangement, utilizing the thickness direction of the substrate to reduce the horizontal footprint of the TFT components while maintaining electrical functionality.
Solution Approach 2:
The gate electrode and data line are nested vertically within the same pixel area, with the gate electrode positioned on one layer and the data line on another layer, allowing them to occupy the same horizontal space at different vertical levels, thereby reducing the overall occupied area.
3Area of stationary object
If the gate electrode and data line are stacked perpendicular to the substrate, then the aperture ratio is increased, but the device complexity is increased
Solution Approach 1:
The stacked configuration utilizes the vertical dimension (thickness direction) to arrange the gate electrode and data line, reducing their horizontal footprint and increasing the aperture ratio. The complexity is managed by maintaining the stacking within the existing pixel area boundaries.
Solution Approach 2:
The overlapping region between the gate electrode and data line serves multiple functions: it provides electrical connection between the TFT components and simultaneously acts as part of the pixel electrode structure, reducing the need for separate connection structures and simplifying the overall device architecture.
Data Source
AI summary
The present disclosure relates to a display substrate. The display substrate includes a substrate, a plurality of thin film transistors (TFTs), and data lines. Each of the TFT includes a gate electrode configured on different layer with the data line. A projection of the gate electrode on a plane partially overlaps with the data lines, wherein the data lines are arranged on the plane. A portion of an orthogonal projection of the gate electrode on the plane is arranged on one side of the data line, wherein the portion is not overlapped by the data lines, and the data lines are arranged on the plane.