Stacked Gate Electrodes with Extended Lower Segments for Bridge Defect Prevention
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Solution Overview
Problem
Highly integrated semiconductor devices with three-dimensional structures face challenges in preventing bridge defects, which affect the reliability and productivity of the devices.
Innovation Solution
The semiconductor device design includes gate electrodes with pad regions, where the second gate electrodes are sequentially stacked above the first upper electrode, exposing the first pad region orthogonally, and the lengths of the lower and upper electrodes are carefully managed to prevent bridge defects, with contact plugs disposed on the pad regions to enhance connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If three-dimensional structures are used to increase integration, then device integration is improved, but bridge defects increase
Solution Approach 1:
The gate electrode is divided into multiple segments including an upper electrode, a lower electrode, and intermediate electrodes. Each segment can be independently formed and controlled, allowing precise management of electrical connections and preventing unintended bridges between adjacent gates while maintaining high device integration through the three-dimensional stacked structure.
2Productivity
If gate electrodes are stacked to increase integration, then device integration is improved, but manufacturing precision requirements increase
Solution Approach 1:
The lower electrode is formed to extend beyond the upper electrode in advance, creating a pre-defined electrical connection path. This preliminary extension ensures that subsequent intermediate electrodes and upper electrodes can be formed with relaxed alignment tolerances, as the extended lower electrode provides a built-in guide and buffer zone that compensates for manufacturing variations.
Solution Approach 2:
Intermediate electrodes are introduced as mediator elements between the lower and upper electrodes. These intermediate electrodes facilitate controlled electrical connections while providing additional alignment reference points that reduce the overall manufacturing precision requirements for the stacked gate structure.
3Reliability
If electrode lengths are extended to prevent bridge defects, then reliability is improved, but device complexity increases
Solution Approach 1:
The lower electrode is extended locally beyond the upper electrode only in the regions where bridge defect prevention is critical, rather than uniformly extending all electrodes. This localized extension approach maintains reliability by preventing bridges at key interfaces while minimizing the overall increase in device complexity and maintaining compact electrode configurations elsewhere.
Data Source
AI summary
A semiconductor device includes first gate electrodes including a first lower electrode, a first upper electrode disposed above the first lower electrode and including a first pad region, and one or more first intermediate electrodes disposed between the first lower electrode and the first upper electrode. Second gate electrodes include a second lower electrode, a second upper electrode disposed above the second lower electrode, and one or more second intermediate electrodes disposed between the second lower electrode and the second upper electrode. The second gate electrodes are sequentially stacked above the first upper electrode, while exposing the first pad region. The first lower electrode extends by a first length, further than the first upper electrode, in a first direction. The second lower electrode extends by a second length, different from the first length, further than the second upper electrode, in the first direction.