Stacked-Gate Ring Oscillator Layout for Lower Phase Noise

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Solution Overview

Problem

Existing clock source generators, such as ring-oscillators and phase-locked loops, suffer from device noise issues that limit phase noise performance, and solutions like LC-tank oscillators and additional phase noise filters are either process-sensitive or require complex circuit structures.

Innovation Solution

Implementing stacked gate delay cells with larger channel areas and pseudo-load circuits in ring oscillators, which reduce noise without using inductors or variable capacitors, and enhance performance by increasing drain current and reducing rise and fall times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LC-tank ring oscillators are used to reduce noise, then phase noise performance is improved, but device area increases and process sensitivity worsens

Engineering Contradiction:
Improvephase noise performanceVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts and removes the inductor component from the oscillating circuit, transforming the LC-tank oscillator into a ring oscillator structure. This extraction eliminates the large area requirement and process sensitivity associated with inductors while maintaining the noise reduction benefits through alternative circuit design

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the mechanical/physical inductor component with an electronic ring oscillator structure composed of transistors and capacitors. This substitution replaces the traditional LC resonance mechanism with a regenerative feedback mechanism, achieving noise reduction without the area and process sensitivity penalties of physical inductors

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If additional phase noise filter circuits are provided, then phase noise performance is improved, but device complexity increases

Engineering Contradiction:
Improvephase noise performanceVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the noise reduction function directly into the oscillating circuit structure itself, rather than adding separate filter circuits. The ring oscillator structure integrates the functions of oscillation and noise reduction in a unified design, eliminating the need for additional phase noise filter circuits and reducing overall device complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ring oscillator structure serves multiple functions simultaneously: it generates the oscillating signal and inherently provides noise reduction through its circuit topology. This multi-functionality eliminates the need for separate dedicated noise filter circuits, reducing device complexity while maintaining phase noise performance

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If inductors and variable capacitors are used, then phase noise performance is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvephase noise performanceVSAvoidprocess sensitivity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent extracts and removes the inductor component from the circuit, eliminating the source of process sensitivity and manufacturing precision requirements associated with inductor fabrication. The remaining circuit uses only transistors and capacitors, which have more relaxed manufacturing tolerances and lower process sensitivity

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20250253832A1Low noise ring oscillator devices and methods
Publication Date: 2025.08.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250253832A1 patent drawing
  • US20250253832A1 patent drawing
  • US20250253832A1 patent drawing

AI summary

A device including delay cells connected in series and in a feedback loop to provide a ring oscillator. At least one of the delay cells in the ring oscillator is a stacked gate delay cell that includes two or more PMOS transistors having first drain/source paths connected in series to each other and having first gates connected to each other and two or more NMOS transistors having second drain/source paths connected in series to each other and to the first drain/source paths and having second gates connected to each other and to the first gates.