3D Stacked Global Shutter Imaging Sensor for Rolling Shutter Distortion
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Solution Overview
Problem
Traditional CMOS image sensors with rolling shutters distort images of moving objects due to progressive reading, necessitating the use of global shutters to capture high-speed motion without distortion.
Innovation Solution
The imaging apparatus incorporates a pixel array with capacitors for storing reset and pixel signals, allowing for correlated double sampling and reducing noise by ensuring correlated signal readout, featuring a layered structure with capacitors on a separate wafer to maximize photodiode area and enhance sensing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a rolling shutter is used in CMOS image sensors, then the device complexity is reduced and manufacturing is easier, but image distortion occurs on moving objects and measurement precision deteriorates
Solution Approach 1:
The patent transitions from a planar single-wafer structure to a three-dimensional stacked structure with separate wafer layers. The photodiode wafer and capacitor wafer are stacked vertically and connected through through-silicon vias (TSVs), enabling spatial separation of sensing and signal storage functions while maintaining compact form factor. This dimensional change resolves the contradiction by allowing global shutter operation without increasing lateral footprint.
Solution Approach 2:
The image sensor is segmented into functionally independent wafer layers: a photodiode wafer for light sensing and a separate capacitor wafer for signal storage and processing. Each wafer can be optimized independently for its specific function, with the photodiode wafer maximizing sensing area and the capacitor wafer providing dedicated signal storage. This segmentation enables global shutter operation while maintaining manufacturing efficiency through specialized process optimization for each layer.
2Device complexity
If capacitors are integrated on the same wafer as photodiodes, then device complexity is reduced, but photodiode area is reduced and sensing performance deteriorates
Solution Approach 1:
The patent moves capacitors from the same planar layer as photodiodes to a vertically stacked configuration on a separate wafer. Through-silicon via (TSV) connections establish electrical pathways between the photodiode wafer and capacitor wafer, enabling signal transfer without lateral interference. This vertical integration maintains low device complexity while maximizing photodiode area for superior sensing performance.
Solution Approach 2:
The patent employs thin-film through-silicon via (TSV) structures to connect the photodiode wafer and capacitor wafer. These thin film interconnections provide efficient electrical coupling between layers while occupying minimal space, enabling the capacitors to be positioned on a separate wafer without increasing overall device footprint or complexity.
3Manufacturing precision
If capacitors are placed on a separate wafer, then photodiode area is maximized and sensing performance is enhanced, but device complexity increases
Solution Approach 1:
The patent utilizes vertical stacking with through-silicon via (TSV) technology to connect photodiode and capacitor functions across separate wafer layers. This three-dimensional architecture maximizes photodiode area on the sensing wafer while positioning capacitors on a dedicated processing wafer, enabling independent optimization of each function without increasing lateral device footprint or overall complexity.
Solution Approach 2:
The patent replaces complex lateral routing and signal transmission paths with vertical TSV connections between wafer layers. This substitution simplifies the interconnection architecture by using direct vertical pathways instead of lengthy lateral traces, reducing parasitic effects and enabling efficient signal transfer despite the separated wafer structure.
4Measurement precision
If a global shutter is implemented, then image distortion is eliminated and measurement precision is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent implements global shutter functionality by segmenting the sensor into a photodiode wafer for simultaneous light capture across all pixels and a separate capacitor wafer for unified signal storage. This segmentation enables true global shutter operation where all pixels are exposed and read out simultaneously, eliminating rolling shutter distortion while maintaining manufacturing efficiency through specialized process optimization for each wafer layer.
Solution Approach 2:
The patent achieves global shutter operation with simplified manufacturing by transitioning to a stacked three-dimensional architecture. The vertical separation of photodiode and capacitor functions across different wafer layers enables simultaneous signal capture and storage for all pixels, eliminating the need for complex lateral routing and reducing manufacturing complexity compared to planar implementations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively eliminates distortion in high-speed image capture by ensuring correlated signal readout and improving the signal-to-noise ratio, while maintaining or enhancing the sensing performance of the pixel array.
Implementation Method 1
the first wafer includes a plurality of photodiodes
Implementation Method 2
a first capacitor configured to store a reset signal, and a second capacitor configured to store a pixel signal
Data Source
AI summary
The present invention relates to an imaging apparatus, which comprises: a pixel array, comprising a plurality of pixels arranged in rows and columns, wherein at least one of the pixels comprises: a first capacitor configured to store a reset signal, and a second capacitor configured to store a pixel signal; a plurality of column circuits, wherein at least one of the column circuits reads the reset signal from the first capacitor, reads the pixel signal from the second capacitor, and generates difference between the reset signal and the pixel signal, wherein the pixel is configured to store the pixel signal to the second capacitor after the reset signal is stored to the first capacitor.


