Stacked IC Bond Pad Layout for Flat, High-Adhesion Chip Bonding

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Solution Overview

Problem

Existing stacked IC devices face issues with non-bond regions, increased design complexity, and fabrication costs due to uniform pitch conductive bond pads leading to height variations and reduced bonding adhesion between chips, which affect yield and performance.

Innovation Solution

The solution involves configuring conductive bond pads with varying pitches in different regions, where the pads in one region have a higher density and uniform pitch aligned with photodetectors, while those in adjacent regions have a lower density and non-uniform pitch, reducing complexity and fabrication costs, and ensuring a flat bonding surface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If uniform pitch conductive bond pads are used, then alignment with photodetectors is improved, but height variations and reduced bonding adhesion occur

Engineering Contradiction:
Improvealignment precisionVSAvoidbonding adhesion
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies local quality by implementing different pitch configurations in different regions of the bond pad array. A first region contains conductive bond pads with a first pitch optimized for alignment with photodetectors, while a second region contains conductive bond pads with a second pitch that maintains a flat bonding surface and prevents height variations. This regional differentiation resolves the contradiction by allowing each region to optimize for its specific function.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If uniform pitch conductive bond pads are used, then alignment with photodetectors is improved, but design complexity and fabrication costs increase

Engineering Contradiction:
Improvealignment precisionVSAvoiddesign complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent reduces design complexity by implementing local quality with region-specific pitch configurations. Instead of using a single uniform pitch across the entire bond pad array, the design divides the array into regions with different pitch values optimized for their specific functions. This approach maintains alignment precision where needed while simplifying the overall design and fabrication process by allowing each region to be independently optimized.

Inventive Principle:
Principle #3Local quality

3Reliability

If varying pitch conductive bond pads are used, then bonding adhesion and flat surface are improved, but alignment with photodetectors may be affected

Engineering Contradiction:
Improvebonding adhesionVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent resolves this contradiction by applying local quality with spatially differentiated pitch configurations. The first region uses a first pitch that ensures precise alignment with photodetectors, while the second region uses a second pitch that maintains a flat bonding surface and prevents height variations. This regional differentiation allows each pitch configuration to optimize for its specific function without compromising the other region's performance.

Inventive Principle:
Principle #3Local quality

4Productivity

If higher density bond pads are used, then transmission efficiency is improved, but RC delay increases

Engineering Contradiction:
Improvetransmission efficiencyVSAvoidRC delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies local quality by implementing different pitch configurations in different regions. The first region with higher bond pad density optimizes for transmission efficiency by providing more connection points for photodetectors, while the second region with lower bond pad density reduces RC delay by decreasing the total capacitive load. This regional differentiation allows the system to optimize for both transmission efficiency and speed simultaneously.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250323194A1Bond structure for stacked IC chips
Publication Date: 2025.10.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250323194A1 patent drawing
  • US20250323194A1 patent drawing
  • US20250323194A1 patent drawing

AI summary

Various embodiments of the present disclosure are directed towards a device including an interconnect structure over a substrate. A bond structure is over the interconnect structure. The bond structure includes a first plurality of conductive bond pads disposed in a first region and a second plurality of conductive bond pads disposed in a second region. The second region is adjacent to at least one side of the first region. A first pitch of the first plurality of conductive bond pads is less than a second pitch of the second plurality of conductive bond pads.