Stacked IC CDM ESD Protection via TSV Coupling
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Solution Overview
Problem
Stacked integrated circuits face damage from charged-device model electrostatic discharge (CDM ESD) due to excessive current peaks during simultaneous discharge events, which can damage input/output circuit components.
Innovation Solution
The integration of CDM ESD protection devices between the input/output circuit and internal circuits, along with through-silicon vias (TSVs), provides a dual-directional conducting path for gradual discharge of accumulated charge, preventing excessive current peaks by coupling ESD protection devices between ground levels of the input/output and internal circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If stacked IC structure is used to connect circuits, then integration density is improved, but susceptibility to CDM ESD damage increases due to simultaneous discharge through TSVs and metal traces
Solution Approach 1:
The patent introduces ESD protection devices as intermediary components between the input/output circuits and internal circuits. These devices include parasitic diodes formed by doped regions that provide controlled discharge paths, acting as mediators to manage the harmful ESD current while preserving the stacked IC structure's integration benefits.
Solution Approach 2:
The patent extracts the ESD protection function into separate dedicated devices (ESD protection devices with parasitic diodes) that are distinct from the main circuit functionality. This allows the protection mechanism to operate independently through controlled discharge paths without interfering with normal circuit operation.
2Reliability
If ESD protection devices are added between input/output circuit and internal circuit, then CDM ESD protection is improved, but device complexity increases
Solution Approach 1:
The patent merges the ESD protection devices with the existing circuit ground structures by coupling them between the input/output circuit ground and internal circuit ground. The protection devices share common ground references and are integrated into the existing TSV and metal trace infrastructure, reducing overall system complexity.
Solution Approach 2:
The ESD protection devices serve multiple functions: they provide CDM ESD protection through parasitic diode discharge paths, maintain ground potential differences between stacked circuits, and enable controlled charge dissipation. This multi-functionality reduces the need for separate dedicated protection structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces peak ESD current values and extends discharge time, thereby protecting the integrated circuit from damage during CDM ESD events by ensuring gradual and controlled discharge of electric charge.
Implementation Method 1
When a charged-device model (CDM) electrostatic discharge (ESD) event occurs on the stacked IC, accumulated charge in each stack will be discharged via the TSVs and the metal traces of each stack in the stacked IC
Implementation Method 2
wherein the at least one transistor is turned off and provides a parasitic dual-directional conduction, during a CDM ESD event, for discharging accumulated charge
Data Source
AI summary
An integrated circuit having charged-device model (CDM) electrostatic discharge (ESD) protection includes an I/O circuit, at least one CDM ESD protection device, and at least one internal circuit. The integrated circuit further includes at least one TSV (Through Silicon Via) each being coupled between a ground of at least one ground of the input/output circuit and one of the at least one ESD protection device, wherein each of the at least one ESD protection device is coupled between one of the at least one TSV and a ground of one of the at least one internal circuit.