Stacked IC Package ESD Layout for Low-Capacitance High-Speed I/O
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Solution Overview
Problem
High-speed operation in electronic products leads to reduced signal strength and larger input/output pad capacitance, resulting in decreased signal margins, which existing technologies fail to adequately address.
Innovation Solution
The implementation of a package device with multiple integrated circuit chips and electrostatic discharge protection elements that form electrostatic discharge paths from input/output pads to voltage supply lines, reducing input capacitance and enhancing signal quality through the use of multiple electrostatic discharge units, some of which are free of coupling to the internal circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed operation is implemented to increase transmission speed, then signal transmission performance is improved, but signal strength decreases and input/output pad capacitance increases
Solution Approach 1:
The patent extracts the electrostatic discharge protection function from the main signal transmission path by introducing separate ESD protection elements and dedicated ESD paths. This allows high-speed signal transmission to occur while ESD protection operates independently, preventing capacitance from degrading signal margins.
Solution Approach 2:
The patent introduces ESD protection elements as intermediary components between the input/output pads and the internal circuits. These intermediaries provide a controlled path for electrostatic discharge while maintaining signal integrity for high-speed operations.
2Reliability
If multiple electrostatic discharge units are used to reduce input capacitance, then signal quality is improved, but device complexity increases
Solution Approach 1:
The patent merges multiple ESD units into a single integrated ESD protection element that interfaces with one input/output pad. This consolidation reduces the number of external components and simplifies the overall device structure while maintaining the signal quality benefits of multiple internal ESD units.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces input capacitance and improves signal quality, benefiting high-performance computing and reducing operating voltage, while also providing adequate protection against electrostatic discharge.
Implementation Method 1
The first electrostatic discharge protection element is configured to form a first electrostatic discharge path from the first input/output pad to a first voltage supply line
Data Source
AI summary
The present disclosure provides a package device. The package device includes a first integrated circuit chip, a second integrated circuit chip, a first input/output pin, and a first electrostatic discharge protection element. The first integrated circuit chip includes a first internal circuit and a first input/output pad disposed on the first integrated circuit chip and coupled to the first internal circuit. The second integrated circuit chip is stacked on the first integrated circuit chip. The second integrated circuit chip includes a second internal circuit and a second input/output pad disposed on the second integrated circuit chip and coupled to the second internal circuit. The first input/output pin is coupled to the first integrated circuit chip and the second integrated circuit chip. The first electrostatic discharge protection element is coupled between the first input/output pad and the first internal circuit.