Stacked IC Package Interconnect Protection

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Solution Overview

Problem

Existing stacked integrated circuit package technologies face challenges in reducing package dimensions, increasing manufacturing yields, and lowering costs due to the need for additional space and complex manufacturing steps required for electrical connections between stacked integrated circuit devices.

Innovation Solution

The use of protective dots, such as epoxy or B-stage material, as spacers and protectants for interconnects between integrated circuit devices, which support wire necks, prevent fractures, and minimize wire sweeps during stacking and molding, while also serving as spacers between devices to distribute stacking force and reduce package height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional spacers are used for electrical connections between stacked integrated circuit devices, then reliable electrical connections can be established, but package height increases and manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidpackage height
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent combines the spacer function and interconnect function into a single structure. The raised interconnect structure serves both as the electrical connection pathway and as the spacing element between stacked devices, eliminating the need for separate spacers and reducing overall package height while maintaining reliable electrical connections

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The interconnect structure is designed to perform multiple functions simultaneously: providing electrical connection, maintaining spacing between devices, and supporting mechanical alignment. This multi-functional design eliminates the need for additional dedicated spacer components

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If additional spacer structures are added for electrical connections, then connection reliability improves, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improveconnection reliabilityVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the spacer structure and interconnect structure into a single integrated component. This reduces the total number of parts and assembly steps while ensuring reliable electrical connections through the raised interconnect design that inherently provides both connection and spacing functions

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If more spacer structures are used, then electrical connections are protected, but manufacturing cost increases

Engineering Contradiction:
Improveinterconnect protectionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines protection functions into the interconnect structure itself. The raised interconnect design inherently protects the electrical connection pathway while the single-integration approach reduces manufacturing steps and costs compared to adding separate protection structures

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7443037B2Stacked integrated circuit package system with connection protection
Publication Date: 2008.10.28 STATS CHIPPAC MANAGEMENT PTE LTD
  • US7443037B2 patent drawing
  • US7443037B2 patent drawing
  • US7443037B2 patent drawing

AI summary

A stacked integrated circuit package system is provided connecting an interconnect between a first integrated circuit device and a substrate, the first integrated circuit device on the substrate, applying a protective dot on the first integrated circuit device, mounting a second integrated circuit device, having an adhesive, on the protective dot, with the adhesive on the first integrated circuit device, connecting the second integrated circuit device and the substrate, and encapsulating the first integrated circuit device, the second integrated circuit device, and the interconnect.