Stacked IC Package Assembly With Dummy Structures for Faster Singulation

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Solution Overview

Problem

The semiconductor industry faces challenges in miniaturization and heat dissipation in integrated circuit (IC) packages, particularly in reducing production time and costs while maintaining high yield and efficiency in forming stacked IC packages with heat dissipation structures.

Innovation Solution

The method involves direct bonding of IC dies to form stacked structures with embedded heat dissipation structures, using dummy structures to facilitate faster production and reduce singulation time, and encapsulating with suitable materials to enhance thermal management and electrical connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional IC packaging methods are used, then manufacturing process is simple, but production time is long and wafer per hour yield is low

Engineering Contradiction:

Improvewafer per hour yieldVSAvoidproduction time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by forming heat dissipation structures and dummy structures on the wafer level before die singulation. This allows multiple dies to be prepared with embedded heat dissipation features simultaneously, enabling faster assembly and reducing production time while increasing wafer per hour yield

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the packaging process into wafer-level preparation and final assembly stages. By preparing heat dissipation structures and dummy structures at the wafer level, the manufacturing process is divided into parallel operations that can be executed simultaneously across multiple dies, improving overall productivity

Inventive Principle:

Principle #1Segmentation

2Temperature

If stacked IC packages with heat dissipation structures are formed, then thermal management is improved, but manufacturing complexity increases

Engineering Contradiction:

Improveheat dissipation efficiencyVSAvoidmanufacturing process complexity

Core Design Contradiction:

TemperatureVSDevice complexity

Solution Approach 1:

The patent merges heat dissipation functionality with the packaging structure by integrating heat dissipation structures directly into the package substrate. This combination approach improves thermal management while avoiding the need for separate, complex heat dissipation components

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent uses dummy structures as intermediary elements that facilitate the integration of heat dissipation structures into the stacked package. These dummy structures serve as placeholders and thermal pathways, enabling improved heat dissipation without significantly complicating the manufacturing process

Inventive Principle:

Principle #24Intermediary (Mediator)

3Productivity

If dummy structures are used to facilitate faster production, then production efficiency is improved, but device structure becomes more complex

Engineering Contradiction:

Improveproduction efficiencyVSAvoidstructure complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent employs dummy structures as temporary, easily fabricable elements that simplify the packaging process. These dummy structures can be readily removed or integrated without adding significant complexity, as they serve their primary function of enabling faster production and alignment during assembly

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach increases wafer per hour yield and reduces production costs by streamlining the formation of integrated circuit packages with effective heat dissipation, enabling more efficient thermal management and electrical connectivity.

Implementation Method 1

a heat dissipation structure embedded in the package substrate

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

direct bonding of IC dies to form stacked structures

Methodology Applied

Scientific EffectAdhesion: Adhesive

Data Source

PatentUS11862605B2Integrated circuit package and method of forming same

Publication Date: 2024.01.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A package and a method of forming the same are provided. A method includes forming a first die structure. The first die structure includes a die stack and a stacked dummy structure bonded to a carrier. A second die structure is formed. The second die structure includes a first integrated circuit die. The first die structure is bonded to the second die structure by bonding a topmost integrated circuit die of the die stack to the first integrated circuit die. The topmost integrated circuit die of the die stack is a farthest integrated circuit die of the die stack from the carrier. A singulation process is performed on the first die structure to form a plurality of individual die structures. The singulation process singulates the stacked dummy structure into a plurality of individual stacked dummy structures.