Stacked Image Sensor Structure for Light Sensitivity and Alignment

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Solution Overview

Problem

Current image sensors face challenges such as limited light sensitivity due to the integration of photodetectors and sensing circuitry on the same chip, alignment issues in stacking technologies like TSVs, and the sequential shifting of image information in CCD sensors, which affects speed and cell density, and the difficulty in achieving high dynamic range imaging without loss of sharpness or increased data storage.

Innovation Solution

The use of layer transfer technology to monolithically stack photodetectors and read-out circuits, with insulating layers and control circuits, allowing for parallel data collection and improved light sensitivity, and the construction of image sensors with multiple layers of varying light-sensitive areas to enhance dynamic range and alignment precision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If photodetectors and sensing circuitry are integrated on the same chip, then device complexity is reduced, but light sensitivity deteriorates due to area consumption by sensing circuits

Engineering Contradiction:
Improveintegration structureVSAvoidlight sensitivity
Core Design Contradiction:
Device complexityVSIllumination intensity

Solution Approach 1:

The patent transitions from planar integration to three-dimensional stacking, placing photodetectors and sensing circuitry on separate chips in vertical layers. This dimensional change allows both components to occupy their own dedicated space, maximizing light-sensitive area while maintaining functional integration through vertical interconnects.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The integrated sensor is divided into separate functional modules: photodetector layer and sensing circuitry layer, fabricated on different chips that are subsequently stacked. This segmentation allows each component to be optimized independently for its specific function while achieving system-level integration.

Inventive Principle:
Principle #1Segmentation

2Illumination intensity

If TSV stacking technology is used to separate photodetectors and circuitry, then light sensitivity is improved, but alignment precision deteriorates due to alignment issues in stacking

Engineering Contradiction:
Improvelight sensitivityVSAvoidalignment precision
Core Design Contradiction:
Illumination intensityVSManufacturing precision

Solution Approach 1:

Alignment marks are pre-formed on the photodetector chip before stacking operations. These marks serve as reference features that guide the alignment process during subsequent bonding to the sensing circuitry chip, ensuring precise registration without requiring complex real-time alignment mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces alignment marks as intermediary reference features that mediate the alignment between the photodetector chip and sensing circuitry chip. These marks provide a common reference framework that simplifies the alignment process and improves manufacturing precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If CCD sensors use sequential shifting for data collection, then device complexity is reduced, but speed deteriorates due to sequential processing

Engineering Contradiction:
Improvedata collection structureVSAvoiddata collection speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent implements parallel data collection by stacking multiple photodetector arrays vertically, with each layer capable of simultaneous image capture. This three-dimensional arrangement transforms sequential processing into parallel processing, dramatically increasing data collection speed while maintaining relatively simple per-pixel circuitry.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Manufacturing precision

If image sensors use single-layer photodetectors, then manufacturing precision is improved, but dynamic range deteriorates due to limited light sensitivity variations

Engineering Contradiction:
Improvephotodetector uniformityVSAvoiddynamic range
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The sensor is segmented into multiple photodetector layers, each potentially optimized for different light sensitivity characteristics. By combining signals from layers with varying sensitivity profiles, the system achieves extended dynamic range while each individual layer maintains manufacturing precision and uniformity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a composite sensor structure with multiple photodetector layers that have different optical and electrical properties. This composite architecture enables the sensor to capture a wider dynamic range by combining responses from layers with varying light sensitivity, similar to how composite materials combine different material properties.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances light sensitivity, reduces alignment errors, and improves the dynamic range of image sensors, enabling faster data collection and more precise image reconstruction without the limitations of traditional sequential shifting or high data storage requirements.

Implementation Method 1

where the second level is bonded to the first level with an oxide to oxide bond

Methodology Applied
Scientific EffectOxide-to-oxide bonding: Welding

Data Source

PatentUS11929372B2Multilevel semiconductor device and structure with image sensors and wafer bonding
Publication Date: 2024.03.12 MONOLITHIC 3D INC
  • US11929372B2 patent drawing
  • US11929372B2 patent drawing
  • US11929372B2 patent drawing

AI summary

An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of image sensors, where the second level is bonded to the first level with an oxide to oxide bond; a plurality of pixel control circuits; a plurality of memory circuits; and a third level disposed underneath the first level, where the third level includes a plurality of third transistors.