Stacked Image Sensor Bonding Barrier Against Anneal Diffusion

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Solution Overview

Problem

The high-pressure annealing process during the fabrication of CMOS image sensors can lead to deterioration of logic circuits due to impurity diffusion, resulting in compromised electrical characteristics.

Innovation Solution

A stacked image sensor design is implemented, featuring a diffusion barrier layer between the sensor chip and the logic chip to prevent hydrogen and deuterium diffusion, which includes forming a first chip with a photoelectric conversion region and a first circuit interconnection layer, a second chip with a second circuit interconnection layer, and a bonding layer connecting the two chips, with the diffusion barrier layer inhibiting the diffusion of hydrogen or deuterium.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-pressure annealing process is used during fabrication, then the photoelectric conversion efficiency is improved, but the logic circuit elements are deteriorated due to impurity diffusion

Engineering Contradiction:
Improvephotoelectric conversion efficiencyVSAvoidimpurity diffusion damage to logic circuit
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the semiconductor device into separate chips: a first chip containing the photodiode array and a second chip containing the logic circuit elements. This segmentation allows the first chip to undergo high-pressure annealing for improved photoelectric conversion efficiency without exposing the logic circuit elements on the second chip to the harmful diffusion effects of the annealing process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a bonding portion as an intermediary structure between the first chip and second chip. This bonding portion includes a bonding layer and a diffusion barrier layer that physically separates the two chips, allowing the first chip to receive hydrogen or deuterium during annealing while the diffusion barrier layer prevents these elements from reaching and damaging the logic circuit elements on the second chip.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively prevents the deterioration of logic circuit elements, thereby enhancing the electrical characteristics of the image sensor without compromising the performance of the sensor chip, improving the overall image sensor's operational efficiency.

Implementation Method 1

a diffusion barrier layer provided between the second circuit interconnection layer and the bonding layer and configured to inhibit diffusion of at least one of hydrogen or deuterium

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

a bonding layer provided between the first circuit interconnection layer and the second circuit interconnection layer and configured to connect the first chip and the second chip

Methodology Applied
Scientific EffectBonding: Welding

Implementation Method 3

The photodiode may serve to convert incident light into an electric signal

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS20240379717A1Image sensor and method of fabricating the same
Publication Date: 2024.11.14 SAMSUNG ELECTRONICS CO LTD
  • US20240379717A1 patent drawing
  • US20240379717A1 patent drawing
  • US20240379717A1 patent drawing

AI summary

An image sensor includes a first chip; a second chip stacked on the first chip; and a bonding portion provided between the first chip and the second chip, wherein the first chip includes: a first semiconductor substrate including a first surface and a second surface opposing the first surface; a photoelectric conversion region in the first semiconductor substrate; and a first circuit interconnection layer provided on the first surface and adjacent to the photoelectric conversion region, wherein the second chip includes: a second semiconductor substrate including a third surface and a fourth surface facing the first surface and opposing the third surface; and a second circuit interconnection layer provided on the fourth surface, and wherein the bonding portion includes: a bonding layer provided between the first circuit interconnection layer and the second circuit interconnection layer and configured to connect the first chip and the second chip; and a diffusion barrier layer provided between the second circuit interconnection layer and the bonding layer and configured to inhibit diffusion of at least one of hydrogen or deuterium.