Stacked Image Sensor with Capacitive Coupling for High Dynamic Range
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Solution Overview
Problem
Conventional image sensors face challenges in achieving high dynamic range (HDR) operation without sacrificing resolution or noise performance, particularly when operating in a Rolling Shutter scanning mode.
Innovation Solution
The implementation of CMOS image sensor arrays with back-side illuminated pixels and a stacked chip architecture, where pinned photodiodes are formed in one chip and in-pixel gain amplifiers are located in another, allows for separate handling of low and high light level illumination signals using capacitively coupled connections and separate amplifiers, enabling HDR operation with consistent integration times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If alternate rows of pixels are assigned different integration times to achieve HDR operation, then dynamic range is improved, but resolution is sacrificed
Solution Approach 1:
The pixel array is segmented into first and second groups of pixels, where first group pixels capture high light level signals during a first integration period, and second group pixels capture low light level signals during a second integration period. This segmentation allows different integration times for different pixel groups without sacrificing overall resolution, as both groups contribute to the final HDR image.
Solution Approach 2:
The patent introduces a temporal dimension by implementing a rolling shutter scanning mode with sequential readout. Pixels are read out in a time-sequential manner across multiple frames, allowing different integration periods for different pixel groups while maintaining spatial resolution. This transforms the HDR problem from a spatial alternating pattern to a temporal sequential pattern.
2Illumination intensity
If conventional HDR methods are used with alternating row integration times, then high dynamic range is achieved, but noise performance deteriorates
Solution Approach 1:
Different pixel groups are assigned different integration periods optimized for their specific lighting conditions. First group pixels use a first integration period optimized for high light levels, while second group pixels use a second integration period optimized for low light levels. This local optimization maintains noise performance across different illumination conditions while achieving HDR.
3Illumination intensity
If stacking chips with separated photodiodes and amplifiers is implemented, then HDR operation with consistent integration times is achieved, but device complexity increases
Solution Approach 1:
The patent utilizes a three-dimensional stacked architecture where photodiodes are formed in a first substrate and amplifiers are formed in a second substrate. This vertical stacking in the third dimension allows separation of signal generation and amplification functions, enabling HDR operation with consistent integration times across all pixels while managing complexity through spatial separation.
Solution Approach 2:
A capacitively coupled connection serves as an intermediary between the photodiodes in the first substrate and the amplifiers in the second substrate. This capacitor-based coupling mechanism transfers charge signals between layers while allowing independent optimization of photodetection and amplification circuits, facilitating HDR operation without direct electrical connection between layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains high sensitivity to low light levels and achieves a dynamic range of 100 dB or more without compromising resolution or noise performance, ensuring effective HDR imaging.
Implementation Method 1
Each pixel includes a photosensitive element that receives incident photons (light) and converts the photons into electrical signals
Implementation Method 2
The high light level illumination signal may be stored on the same capacitor that provides the connection to the amplifier for the low light level signal
Data Source
AI summary
Imaging pixels may be operated in a rolling shutter scanning mode. Charge signal that is generated on a first chip may be capacitively coupled to signal processing circuits on a second chip. A capacitor may be placed in the signal path that provides signal coupling between the chips and stores overflow charge from pixels that have been exposed to high light level illumination. This enables high dynamic range using only a single charge integration time. The pixel may include an in-pixel negative feedback amplifier. The chip-to-chip electrical connections between the first and second chips may be realized at each pixel as a hybrid bond with a single bond per pixel. Image sensors fabricated using this technology may have small size pixels, high resolution, high dynamic range, and a single charge integration time.