Stacked Image Sensor A/D Capacitor Layout for Higher Resolution
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Solution Overview
Problem
Existing image sensors with multiple semiconductor chips require increased chip area due to the disposition of multiple elements, leading to inefficiencies in space utilization and potential reductions in pixel opening ratio.
Innovation Solution
The image sensor is designed with a layered structure where capacitors for A/D conversion are distributed across multiple substrates, with smaller capacitors closer to the comparison unit to minimize parasitic capacitance effects, allowing for higher resolution without increasing chip area and maintaining pixel opening ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple semiconductor chips are laminated together to increase chip area, then the chip area increases, but the resolution and accuracy of A/D conversion deteriorate due to increased parasitic capacitance
Solution Approach 1:
The patent transitions from planar capacitor arrangement to three-dimensional stacked arrangement across multiple circuit layers. Capacitors are distributed across different vertical layers (first circuit layer, second circuit layer, third circuit layer) connected via through-electrodes, utilizing the vertical dimension to increase chip area without increasing lateral footprint or parasitic capacitance effects.
Solution Approach 2:
The capacitor array is segmented and distributed across multiple circuit layers rather than concentrated in a single layer. Each layer contains a subset of capacitors (e.g., first capacitor in first layer, second capacitor in second layer), reducing the parasitic capacitance impact on any single capacitor while maintaining total capacitance for high-resolution A/D conversion.
2Area of stationary object
If multiple semiconductor chips are laminated together, then the chip area increases, but the device complexity increases
Solution Approach 1:
Multiple circuit layers containing capacitors are merged into a single integrated structure with through-electrodes providing electrical connections between layers. The comparison unit, capacitors, and connection structures are combined into one unified semiconductor chip, eliminating the need for separate chips and simplifying the overall device structure while maintaining increased chip area.
3Measurement precision
If capacitors are positioned closer to the comparison unit, then parasitic capacitance effects are minimized and accuracy improves, but layout flexibility is reduced
Solution Approach 1:
The patent resolves the layout constraint by utilizing the vertical dimension across multiple circuit layers. Capacitors can be positioned close to the comparison unit in the vertical direction (through through-electrodes) while maintaining lateral spacing for efficient layout. This three-dimensional arrangement provides both accuracy improvement and manufacturing flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances A/D conversion accuracy and resolution while preventing reductions in pixel opening ratio, reducing conversion errors due to parasitic capacitance.
Implementation Method 1
a photoelectric conversion unit that photoelectrically converts incident light and generates a charge
Data Source
AI summary
An image sensor includes: a photoelectric conversion unit that photoelectrically converts incident light and generates a charge; and an A/D conversion unit that converts the analog signal generated due to charge generated by the photoelectric conversion unit into a digital signal, wherein: the A/D conversion unit includes a comparison unit that compares the analog signal with a reference signal and a first circuit layer including a first capacitor for generating the reference signal and a second circuit layer laminated to the first circuit layer and including with a second capacitor for generating the reference signal.