Stacked Image Sensor with Separate Digital Wafer
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Solution Overview
Problem
The challenge in designing image sensors for cellular phones is to create larger pixels while maintaining a compact sensor size, as smaller pixels result in reduced charge storage capacity and worse signal-to-noise ratio, and rolling blade shutters fail to capture fast-moving objects effectively.
Innovation Solution
A global shutter image sensor design with separate digital and analog integrated circuit substrates, utilizing a ten transistor pixel architecture with two or four storage capacitors, allowing independent writing and reading of each capacitor to improve signal quality and reduce noise, while maintaining a compact size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the size of individual pixels is shrunk to increase resolution, then the pixel count increases, but the charge storage capacity is reduced and signal-to-noise ratio deteriorates
Solution Approach 1:
The patent transitions from planar integration to three-dimensional stacked architecture, placing photodetectors on one substrate and storage capacitors on another substrate in vertical arrangement. This dimensional change allows larger pixel area while maintaining compact sensor footprint, thereby improving charge storage capacity and signal-to-noise ratio without sacrificing resolution
Solution Approach 2:
The patent divides the image sensor into separate functional modules: photodetector array on one substrate and storage capacitor array on another substrate. This segmentation allows independent optimization of each component's size and performance, enabling larger photodetectors with sufficient storage capacity through vertical stacking
2Reliability
If larger pixels are used to improve charge storage capacity and signal-to-noise ratio, then image quality improves, but the sensor size increases and becomes less compact
Solution Approach 1:
By stacking substrates vertically, the patent accommodates larger pixels in the horizontal plane while using the vertical dimension to house additional components like storage capacitors. This maintains compact overall sensor size while improving charge storage capacity and signal-to-noise ratio through larger photodetector area
3Area of stationary object
If rolling blade shutter pixels are used to reduce area, then sensor size is minimized, but fast-moving objects cannot be captured effectively
Solution Approach 1:
The stacked architecture enables global shutter operation by providing dedicated storage capacitors on a separate substrate for each pixel. This vertical separation allows simultaneous exposure of all pixels followed by independent readout, capturing fast-moving objects accurately while maintaining compact sensor dimensions through three-dimensional integration
4Reliability
If global shutter pixels with dedicated storage capacitors are used to capture fast-moving objects, then capture accuracy improves, but surface area consumption increases
Solution Approach 1:
The patent places storage capacitors on a separate substrate stacked vertically above or below the photodetector array. This three-dimensional arrangement provides dedicated storage capacity for each pixel in global shutter operation without increasing the planar footprint, thus maintaining compact sensor size while improving capture accuracy of fast-moving objects
Solution Approach 2:
By separating photodetectors and storage capacitors into different substrates, the patent allows each component to be optimized independently. The storage capacitors can be densely packed in the vertical dimension, providing sufficient storage capacity for global shutter operation without consuming excessive surface area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances image quality by reducing noise and enabling better capture of fast-moving objects, while minimizing sensor size through efficient use of space and independent image storage.
Implementation Method 1
a first integrated circuit die having formed therein photodiodes and readout circuitry for the photodiodes
Implementation Method 2
A second integrated circuit die has formed therein storage capacitor structures for the photodiodes
Data Source
AI summary
An electronic device includes a first integrated circuit die having formed therein photodiodes and readout circuitry for the photodiodes, with the readout circuitry including output pads exposed on a surface of the first integrated circuit die. A second integrated circuit die has formed therein storage capacitor structures for the photodiodes and digital circuitry for performing image processing on data stored in the storage capacitor structures, with the storage capacitor structures including input pads exposed on a surface of the second integrated circuit die. The first and second integrated circuit die are in a face to face arrangement such that the output pads of the first integrated circuit die face the input pads of the second integrated circuit die. An interconnect couples the output pads of the first integrated circuit die to the input pads of the second integrated circuit die.