3-Layer Stacked Image Sensor for Global Shutter Resolution
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Solution Overview
Problem
Conventional image sensors require a Correlated Double Sampling (CDS) transfer transistor and capacitor for global shutter function, increasing chip area and reducing resolution.
Innovation Solution
A 3-layer stacked image sensor design, where the lower device contains logic transistors, the intermediate device includes a CDS circuit and capacitor, and the upper device features a photodiode, floating diffusion region, and transfer gate electrode, allowing for efficient signal processing and increased light reception area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If CDS transfer transistor and CDS capacitor are added to each pixel for global shutter function, then global shutter capability is improved, but chip area increases and resolution drops
Solution Approach 1:
The patent transitions from a planar 2D layout to a 3D stacked architecture, placing the photodiode in the upper device layer and the CDS circuit in the lower device layer. This vertical stacking allows global shutter functionality without increasing the horizontal chip footprint, thereby maintaining high resolution while enabling adaptability.
Solution Approach 2:
The image sensor is segmented into multiple independent layers: an upper device layer containing the photodiode and a lower device layer containing the CDS circuit. This segmentation allows each layer to be optimized independently and connected through vertical connections, resolving the area-constraint contradiction.
2Adaptability or versatility
If CDS transfer transistor and CDS capacitor are added to each pixel, then global shutter function is enabled, but pixel area increases reducing resolution
Solution Approach 1:
By moving the CDS circuit to a separate lower device layer and connecting it to the photodiode through vertical connections, the horizontal pixel area is reduced. This allows higher pixel density and improved resolution while maintaining global shutter functionality through the vertical 3D architecture.
3Device complexity
If all transistors are formed in a single layer, then device structure is simple, but signal processing efficiency is reduced
Solution Approach 1:
The device is segmented into functional layers: the upper device layer handles light detection with the photodiode, while the lower device layer handles signal processing with the CDS circuit. This segmentation improves signal processing efficiency by placing processing elements closer to their functional requirements, while the overall structure remains manageable through systematic layering.
Solution Approach 2:
The transition from a single-layer to a multi-layer vertical architecture allows complex signal processing functions to be implemented without increasing horizontal complexity. The vertical stacking organizes the device into functional zones that improve processing efficiency while maintaining structural clarity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances image sensor resolution and photoelectric conversion efficiency while enabling both rolling and global shutter functions, reducing processing time and power consumption.
Implementation Method 1
an upper device that is formed over the intermediate device and includes a photodiode
Data Source
AI summary
An image sensor may include a lower device that includes logic transistors, an intermediate device that is formed over the lower device and includes a Correlated Double Sampling (CDS) circuit and a capacitor, and an upper device that is formed over the intermediate device and includes a photodiode, a floating diffusion region, and a transfer gate electrode.