Stacked Image Sensor Structure for High-Density Light Capture
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Solution Overview
Problem
Current image sensors face challenges in achieving high dynamic range and efficient light capture due to the overlap of photodetectors and sensing circuitry, leading to limitations in pixel size, light sensitivity, and the sequential shifting of image information in CCD technology, which affects speed and cell density.
Innovation Solution
The use of layer transfer technology to monolithically stack photodetectors and read-out circuits, allowing for parallel data collection and the integration of image sensors with distinct light-sensitive areas and control circuits, enabling improved light detection and processing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If photodetectors and sensing circuitry are integrated on the same chip, then device complexity is reduced, but light sensitivity and pixel size are limited due to area overlap
Solution Approach 1:
The patent transitions from planar integration to three-dimensional stacking, placing photodetectors and sensing circuitry on separate layers vertically stacked on top of each other. This dimensional change allows both components to occupy their optimal areas without overlapping, thereby improving light sensitivity while maintaining integration benefits.
Solution Approach 2:
The integrated sensor is segmented into distinct functional layers: a photodetector layer for light detection and a separate sensing circuitry layer for signal processing. This segmentation allows each layer to be optimized independently for its specific function, with the photodetector layer maximizing light capture area and the circuitry layer handling processing tasks.
2Illumination intensity
If CCD technology is used for image sensing, then light detection capability is improved, but processing speed decreases due to sequential shifting of image information
Solution Approach 1:
By stacking the photodetector layer above the sensing circuitry layer in three dimensions, the patent enables parallel processing architecture. Multiple photodetectors can simultaneously transfer their signals to corresponding circuit elements directly below them, eliminating the sequential shifting bottleneck of traditional CCD technology while maintaining high light detection capability.
3Manufacturing precision
If pixel size is reduced to increase pixel density, then image resolution is improved, but light sensitivity deteriorates due to smaller light-sensitive area
Solution Approach 1:
The patent utilizes vertical stacking to separate the light-sensitive area from the processing area. The photodetector layer can be designed with large active areas optimized for light capture, while the sensing circuitry resides in the vertical dimension below. This allows high pixel density through compact vertical integration without compromising the horizontal light-sensitive area of each pixel.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances light detection efficiency, increases pixel density, and reduces the dynamic range limitations, allowing for higher quality images with improved sharpness and reduced data storage requirements.
Implementation Method 1
bonding a first oxide layer to a second oxide layer
Data Source
AI summary
An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of semiconductor devices; a third level overlaying the second level, where the third level includes a plurality of image sensors, where the first level includes a plurality of landing pads, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.