Stacked Image Sensor Logic Pixel Substrate Segmentation
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Solution Overview
Problem
Current image sensor manufacturing processes are complex and not highly integrated, limiting the efficiency and integration density of image sensors.
Innovation Solution
The design includes a lower substrate with logic circuits and an upper substrate with pixels, where all upper transistors are of the same conductivity type, and an interconnection layer connects the two substrates, simplifying the manufacturing process and enhancing integration density by sharing transistors and reducing crosstalk between pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different conductivity type transistors are used in the upper substrate to achieve versatile logic functions, then the functional versatility is improved, but the manufacturing process complexity increases
Solution Approach 1:
The image sensor is divided into two separate substrates: the upper substrate contains only pixels with transistors of the same conductivity type, while the lower substrate contains logic circuits with transistors of different conductivity types. This segmentation allows each substrate to be optimized independently, simplifying the manufacturing process while maintaining functional versatility through the interconnection layer.
Solution Approach 2:
The patent transitions from a single-substrate architecture to a stacked multi-substrate architecture. By moving logic circuits to the lower substrate and keeping only pixel transistors in the upper substrate, the solution adds a vertical dimension to the device structure, enabling process simplification without sacrificing functionality.
2Reliability
If more transistors are integrated in the upper substrate to reduce crosstalk, then the signal isolation is improved, but the manufacturing complexity increases
Solution Approach 1:
The patent segments the transistor functions between two substrates: pixel transistors remain in the upper substrate while logic circuit transistors are moved to the lower substrate. This segmentation reduces the number of transistors in the upper substrate, simplifying manufacturing while maintaining signal isolation through the physical separation and interconnection layer design.
3Quantity of substance
If a stacked structure is used to increase integration density, then the integration density is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent merges the pixel substrate and logic circuit substrate into a single stacked structure connected by an interconnection layer. This combining achieves high integration density by utilizing three-dimensional space while managing manufacturing complexity through process segmentation and standardized interconnection interfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration simplifies the manufacturing process and improves integration density by allowing all upper transistors to be of the same conductivity type, enhancing photoelectric efficiency and reducing crosstalk, leading to more efficient image sensing.
Implementation Method 1
a photoelectric conversion region configured to change light energy into electric signals
Data Source
AI summary
An image sensor includes a lower substrate including logic circuits and an upper substrate including pixels. Transistors provided on the upper substrate have the same conductivity type. Each of the transistors includes source/drain regions provided in the upper substrate, an upper gate electrode provided on the upper substrate, and a silicon oxide layer disposed between the upper substrate and the upper gate electrode. The silicon oxide layer is in physical contact with the upper substrate and the upper gate electrode.