Stacked Image Sensor Vertical Charge Integration
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in achieving high dynamic range (HDR) operation while maintaining low light level resolution, often requiring shorter integration times or larger chip sizes, which can result in noise and reduced performance.
Innovation Solution
The implementation of a pixel circuit with a pinned photodiode and vertically-oriented deep trench isolation capacitors, allowing for simultaneous electron and hole charge integration and storage, enabling global shutter scanning mode with improved dynamic range and quantum efficiency without increasing pixel size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional CMOS image sensors use three or four transistors per pixel for charge-to-voltage conversion, then the pixel circuit can be implemented, but the dynamic range is limited and low light level resolution deteriorates
Solution Approach 1:
The patent introduces a vertical stacking dimension by placing the floating diffusion node in a first substrate and the readout circuitry in a second substrate positioned below the first substrate. This three-dimensional arrangement allows simultaneous electron and hole charge integration in separate regions without increasing the lateral pixel footprint, thereby expanding dynamic range while preserving low light level resolution.
Solution Approach 2:
The pixel circuit is segmented into distinct functional regions: a photodetector region for charge generation, a floating diffusion node for charge accumulation, and a readout circuitry for signal processing. This segmentation allows independent optimization of each region, enabling high dynamic range operation while maintaining precise low light level detection capabilities.
2Adaptability or versatility
If charge storage capacitors are incorporated into pixels to address high dynamic range operation, then dynamic range improves, but the overall chip size increases due to elements occupying large area in the pixel
Solution Approach 1:
The patent moves the charge storage function to the vertical dimension by implementing the floating diffusion node in a separate first substrate layer, positioned above the readout circuitry in the second substrate. This vertical separation eliminates the need for large lateral capacitor structures within each pixel, maintaining small pixel size while achieving high dynamic range through extended charge storage capacity in the stacked architecture.
3Adaptability or versatility
If a shorter integration time is assigned to some sensor rows or pixels for high dynamic range operation, then dynamic range improves, but detection of short pulse duration light sources is missed
Solution Approach 1:
The patent segments the pixel circuit into distinct charge accumulation and readout regions, with the floating diffusion node providing extended charge storage capacity. This segmentation enables the pixel to maintain full integration time for all pixels while achieving high dynamic range through the increased storage capacity, ensuring no light signals are missed regardless of duration.
4Adaptability or versatility
If logarithmic charge-to-voltage conversion characteristic is used for high dynamic range, then dynamic range improves, but signal noise increases
Solution Approach 1:
The patent changes the physical parameter of charge storage capacity by implementing a floating diffusion node with extended volume in the stacked substrate architecture. This increases the maximum charge storage capacity linearly, providing high dynamic range through increased capacity rather than logarithmic compression, thereby avoiding the noise amplification inherent in logarithmic conversion while maintaining linear response characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables high performance HDR image capture with reduced noise and smaller pixel size, enhancing the dynamic range and quantum efficiency of the image sensor.
Implementation Method 1
When photons impinge on the photosensor, electron-hole pairs are generated
Data Source
AI summary
Various embodiments of the present technology may comprise methods and apparatus for an image sensor capable of simultaneous integration of electrons and holes. According to an exemplary embodiment, the image sensor comprises a backside-illuminated hybrid bonded stacked chip image senor comprising a pixel circuit array, and each pixel circuit comprising a charge storage capacitor oriented in a vertical direction in a deep trench isolation region. Both the electrons and holes are integrated (collected) using a global shutter operation, and the charge storage capacitor is used for storing a signal generated by the holes.