Stacked Solid-State Imaging Device Crosstalk Reduction
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Solution Overview
Problem
Existing stacked solid-state imaging devices experience crosstalk interference between upper and lower elements, which is typically addressed by forming a metal shielding layer, but this increases the number of procedures required.
Innovation Solution
The solution involves laying out first interconnect lines, such as control or power supply lines, in a layer above vertical signal lines, and second interconnect lines in a lower layer, with varying line widths or thicknesses and permittivity adjustments in interlayer insulating films to reduce crosstalk interference without increasing procedural complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a metal shielding layer is formed on each chip to reduce crosstalk interference, then crosstalk between upper and lower elements is reduced, but the number of procedures increases
Solution Approach 1:
The patent combines the shielding function with existing interconnect lines by laying out first interconnect lines (control lines, ground lines, or power supply lines) in a layer above vertical signal lines and second interconnect lines in a layer below the vertical signal lines. This merging approach eliminates the need for separate shielding layers while maintaining crosstalk reduction functionality.
Solution Approach 2:
The interconnect lines serve dual purposes: they perform their primary function of transmitting control signals, power, or ground references, while simultaneously acting as shielding structures against crosstalk interference. This multi-functionality reduces the overall number of layers and procedures required.
2Object-affected harmful factors
If vertical signal lines are surrounded by interconnect lines in multiple layers, then crosstalk interference is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent segments the shielding function across multiple existing interconnect layers rather than requiring a single complex shielding structure. First interconnect lines are placed above vertical signal lines and second interconnect lines below them, creating a distributed shielding approach that integrates with standard multi-layer manufacturing processes.
Solution Approach 2:
The patent utilizes the vertical dimension by placing interconnect lines in layers both above and below the vertical signal lines. This three-dimensional arrangement of interconnect layers provides shielding without requiring additional lateral space or complex planar structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces crosstalk interference, minimizing load capacitance differences and enhancing imaging characteristics by shielding vertical signal lines and adjusting permittivity according to distance from the logic chip.
Implementation Method 1
The solid-state imaging device may further include interconnect interlayer insulating films having different permittivities. The permittivities are adjusted in accordance with the distances from the logic chip.
Data Source
AI summary
The present disclosure relates to a solid-state imaging device that can reduce crosstalk interference, and to an electronic apparatus. In the upper chip, VSLs, VSLs, and control lines are stacked in this order from the bottom. That is, in the stacked solid-state imaging device, the control lines are laid out in the uppermost layer of the upper chip. In this structure, the influence of a lower chip on the two sets of VSLs can be shielded by the control lines. The present disclosure can be applied to CMOS solid-state imaging devices to be used in electronic apparatuses, such as a camera apparatus.