Stacked Solid-State Imaging Device Pixel Grouping
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Solution Overview
Problem
Conventional CMOS solid-state imaging devices face challenges in improving data rate, in-plane imaging performance, and functionality due to speed and density limits in electric conduction, and suffer from size constraints and high probabilities of defective pixels caused by connection failures in stacked semiconductor substrates.
Innovation Solution
A solid-state imaging device is configured with multiple semiconductor substrates stacked, where pixel cells are divided into groups with shared connection electrodes, allowing adjacent pixels of the same wavelength band to be separated, reducing the likelihood of connection failures and enabling interpolation of signals in case of defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a plurality of semiconductor substrates are stacked with one connection electrode unit per pixel, then electrical connection between substrates is achieved, but the probability of connection failure increases due to the large number of connection electrodes
Solution Approach 1:
Multiple pixel cells (specifically four pixel cells corresponding to different wavelength bands) share a common connection electrode unit. This merging approach reduces the total number of connection electrodes required, thereby lowering the probability of connection failures while maintaining electrical connectivity between stacked substrates.
Solution Approach 2:
The pixel array is divided into multiple pixel groups, where each group shares a common connection electrode unit. This segmentation strategy organizes the connection structure to reduce the overall number of connection points between substrates, improving reliability by minimizing potential failure points.
2Ease of manufacture
If peripheral circuits are arranged around the pixel array unit in a monolithic structure, then circuit integration is achieved, but the substrate area increases and performance improvement is limited due to conduction speed limits
Solution Approach 1:
The device transitions from a two-dimensional monolithic structure to a three-dimensional stacked structure. Peripheral circuits and pixel arrays are arranged on different substrates stacked in the vertical dimension, enabling high integration without increasing the horizontal substrate area.
Solution Approach 2:
The device is divided into multiple semiconductor substrates, with different functional regions (pixel arrays and peripheral circuits) placed on separate substrates. This segmentation allows independent optimization of each substrate while achieving high integration through stacking.
3Measurement precision
If each pixel cell is connected individually to corresponding circuits, then signal transmission accuracy is maintained, but the number of connection electrodes increases and manufacturing complexity increases
Solution Approach 1:
Multiple pixel cells share a common connection electrode unit, reducing the total number of connections. The shared connection structure maintains signal transmission accuracy by providing dedicated connection paths for each pixel group while simplifying the overall connection architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances performance, reduces defective pixels, and maintains image quality by allowing for effective signal interpolation, thereby improving the reliability and cost-effectiveness of the imaging device.
Implementation Method 1
each pixel cell has a photoelectric conversion unit that converts an incident light beam into an electric signal
Data Source
AI summary
There are provided a first semiconductor substrate in which a plurality of photoelectric conversion circuits, which are some circuit elements of the pixel cells including the photoelectric conversion unit, are formed in a two-dimensional matrix, a second semiconductor substrate in which a plurality of memory circuits, which are some other circuit elements of the pixel cells, are formed in a two-dimensional matrix, wherein the some other circuit elements of the pixel cells include memory units that correspond to the photoelectric conversion circuits, store electric signals output by the photoelectric conversion units, and output pixel signals according to the electric signals, and a connection electrode electrically connected to a signal line of the photoelectric conversion circuits and a signal line of the memory circuits, wherein the pixel cells are divided into a plurality of pixel groups in which the pixel cells are combined so that adjacent pixel cells are not included if pixel cells corresponding to light beams of the same wavelength band are considered to be arranged on one surface, wherein the same connection electrode is shared between the photoelectric conversion circuits and between the memory circuits of the pixel cells included in the same pixel group, and wherein signal lines of the photoelectric conversion circuits and signal lines of the memory circuits of the pixel cells included in different pixel groups are connected by different connection electrodes.