Stacked Imaging Sensor Layout With Overlapping Transistors

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Solution Overview

Problem

Existing imaging devices face challenges in achieving high functionality, downsizing, high-speed operation, and reliability while requiring multiple polishing and bonding steps, which affect yield and cost.

Innovation Solution

A stacked structure of semiconductor devices, including a silicon substrate, epitaxial growth layer, and metal oxide transistors, eliminates the need for bonding steps and allows for a compact, high-performance imaging device with overlapping transistors and photoelectric conversion devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple devices using silicon substrates are stacked to achieve high functionality, then the functional capabilities are improved, but the manufacturing complexity increases due to required polishing and bonding steps

Engineering Contradiction:
Improvefunctional capabilitiesVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent transitions from planar arrangement to three-dimensional stacking, allowing multiple devices to be arranged vertically on a single silicon substrate. This dimensional change enables high functionality without requiring multiple separate substrates and their associated bonding and polishing steps, thus resolving the contradiction between functional capabilities and manufacturing complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges multiple devices into a single integrated stacked structure on one silicon substrate. By combining what would traditionally require separate substrates and assembly steps into a unified monolithic structure, the invention eliminates the need for repeated polishing and bonding operations, thereby reducing manufacturing complexity while maintaining high functionality

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If multiple polishing and bonding steps are performed to stack devices, then the functional integration is improved, but the manufacturing yield deteriorates

Engineering Contradiction:
Improvefunctional integrationVSAvoidmanufacturing yield
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent performs all necessary device formation operations on a single silicon substrate before any stacking or integration steps. By completing transistor fabrication, photoelectric conversion device creation, and interconnection formation in advance on one substrate, the invention eliminates subsequent bonding and polishing steps that would otherwise reduce manufacturing yield, thus resolving the contradiction between functional integration and manufacturing yield

Inventive Principle:
Principle #10Preliminary action

3Volume of moving object

If components are arranged in stacked structure to achieve downsizing, then the device size is reduced, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvedevice sizeVSAvoidalignment precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent achieves downsizing by arranging components in the vertical dimension through stacking rather than compressing them in the planar dimension. This approach reduces overall device volume while maintaining adequate spacing and alignment tolerances within each layer, thereby resolving the contradiction between device size reduction and manufacturing precision requirements

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Area of stationary object

If transistors and photoelectric conversion devices are overlapped to reduce area, then the area efficiency is improved, but the device complexity increases

Engineering Contradiction:
Improvearea efficiencyVSAvoidstructural complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent utilizes vertical stacking to overlap transistors and photoelectric conversion devices in the depth dimension rather than requiring complex lateral arrangements. This three-dimensional configuration achieves high area efficiency while maintaining relatively simple planar layouts and standard fabrication processes, thereby resolving the contradiction between area efficiency and structural complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a highly functional, small, and reliable imaging device capable of high-speed operation with improved yield and reduced manufacturing complexity.

Implementation Method 1

A single crystal silicon substrate can be used as the semiconductor substrate, and a silicon epitaxial growth layer formed on the single crystal silicon substrate can be used as the semiconductor layer

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS12495629B2Imaging device, electronic device, and moving object
Publication Date: 2025.12.09 SEMICON ENERGY LAB CO LTD
  • US12495629B2 patent drawing
  • US12495629B2 patent drawing
  • US12495629B2 patent drawing

AI summary

A small-sized and highly functional imaging device is provided. The imaging device includes a photoelectric conversion device formed on a silicon substrate and a transistor including a channel formation region in a silicon epitaxial growth layer formed on the silicon substrate. The transistor provided in the epitaxial growth layer has favorable electrical characteristics, so that the imaging device with little noise can be formed. Since the transistor can be formed so as to have a region overlapping with the photoelectric conversion device, the imaging device can be downsized.