Stacked Inductor-Capacitor RFIC for Miniaturization

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Solution Overview

Problem

RFICs with high resonance frequencies require large LC circuits, leading to increased IC size, complex signal routing, and numerous through-substrate vias, making miniaturization challenging.

Innovation Solution

Implementing stacked inductor-capacitor (LC) structures with the inductor aligned over the capacitor, where the feed connects to the capacitor's interior, allowing for uniform current distribution and reducing the area occupied by LC circuits in RFICs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional LC circuits are used to achieve high resonance frequencies, then the desired resonance frequency is achieved, but the area occupied by LC circuits increases

Engineering Contradiction:
Improveresonance frequencyVSAvoidarea occupied by LC circuits
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent transitions from a planar layout to a three-dimensional stacked architecture where the inductor and capacitor are positioned on different layers of the semiconductor substrate. This vertical stacking enables high-frequency resonance while occupying minimal planar area, directly resolving the contradiction between achieving high resonance frequency and minimizing circuit area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If conventional LC circuits are used, then resonance functionality is achieved, but the number of through-substrate vias increases

Engineering Contradiction:
Improveresonance frequencyVSAvoidnumber of through-substrate vias
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the LC circuit into distinct vertical layers: the capacitor is formed on a first layer of the semiconductor substrate while the inductor is formed on a second layer. This segmentation eliminates the need for numerous through-substrate vias by using localized vertical interconnects (vias) between adjacent layers, significantly reducing via count and structural complexity while maintaining resonance functionality.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If larger LC circuits are used for high resonance frequencies, then the desired electrical performance is achieved, but signal routing complexity increases

Engineering Contradiction:
Improveresonance frequencyVSAvoidsignal routing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

By moving to a three-dimensional stacked configuration, the patent simplifies signal routing. The capacitor and inductor are vertically aligned with direct vertical interconnects between them, eliminating complex lateral signal paths required in planar designs. This vertical integration drastically reduces routing complexity while achieving the required high-frequency resonance performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11522506B2Compact RFIC with stacked inductor and capacitor
Publication Date: 2022.12.06 NXP BV
  • US11522506B2 patent drawing
  • US11522506B2 patent drawing
  • US11522506B2 patent drawing

AI summary

Various embodiments relate to an integrated circuit including a transistor device having input and output terminals, and an inductor-capacitor (LC) circuit coupled to one of the terminals of the transistor device. The LC circuit includes a capacitor having a top plate and a bottom plate, a inductor having a coil structure, and a connector configured to couple the inductor and an interior portion the top plate of the capacitor. The inductor at least partially overlaps the capacitor.