Stacked Inductor with Multi-Layer Lower Coils

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Solution Overview

Problem

Conventional on-chip stacked inductors with high parasitic resistance in the lower metal layer degrade the quality factor (Q factor), limiting their performance in RF applications despite increased inductance.

Innovation Solution

A stacked inductor design with multiple layers of metal coils aligned vertically and interconnected through vias, reducing parasitic resistance by increasing the thickness of the lower metal coils, thereby enhancing the Q factor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional stacked inductor structure is used with single-layer metal coils, then inductance is increased by more than two times compared with single-layer inductor, but parasitic resistance becomes high due to thin lower metal layer, degrading Q factor

Engineering Contradiction:

ImproveinductanceVSAvoidparasitic resistance

Core Design Contradiction:

Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent combines multiple metal layers (at least two layers) to form each lower layer metal coil, merging the conductive paths in parallel. This reduces the parasitic resistance of the lower layer coils while maintaining the stacked inductance benefit, thereby improving the overall Q factor without sacrificing the inductance enhancement.

Inventive Principle:

Principle #5Merging (Combining)

2Area of stationary object

If conventional stacked inductor structure is used, then chip area is reduced significantly, but Q factor is degraded due to high resistance in lower metal layer

Engineering Contradiction:

Improvechip areaVSAvoidQ factor

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

By merging multiple metal layers to form thick lower layer metal coils, the patent reduces the parasitic resistance that would otherwise degrade the Q factor. This allows the stacked inductor to maintain both its area-reducing advantage and its Q factor performance for RF applications.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design achieves increased inductance without expanding chip area and significantly improves the Q factor by over 20% compared to conventional structures, enabling more efficient RF performance.

Implementation Method 1

adjacent metal coils being connected at the corresponding ends through a via

Methodology Applied

Scientific EffectElectrical Conduction: Conduction (electrical)

Implementation Method 2

a top layer metal coil, and at least two lower layer metal coils, the metal coils being aligned with each other

Methodology Applied

Scientific EffectElectromagnetic Induction: Electromagnetic Induction

Data Source

PatentUS8289118B2Stacked inductor

Publication Date: 2012.10.16 SHANGHAI HUAHONG GRACE SEMICON MFG CORP

AI summary

A stacked inductor with combined metal layers is represented in this invention. The stacked inductor includes: a top layer metal coil, and at least two lower layer metal coils, the metal coils being aligned with each other; adjacent metal coils being connected at the corresponding ends through a via; wherein, each of the lower layer metal coils is consisted of plural layers of metal lines which are interconnected. With the same chip area, the stacked inductor of the present invention can achieve higher inductance and Q factor because of the mutual inductance generated from the plural layers of metal lines and the reduced parasitic resistance.