Stacked Insulating Layer Structure for Transistor Integration
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high integration, high-speed operation, and reliable electrical characteristics, especially for applications in high-definition display apparatuses and extended reality devices.
Innovation Solution
A semiconductor device is designed with a stacked-layer structure of insulating layers, including a region with higher film density or nitrogen content, to enhance the electrical characteristics and reliability of transistors, while also allowing for high productivity and miniaturization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If transistor size is reduced to achieve high integration, then the degree of integration is improved, but manufacturing precision and reliability become more difficult to maintain
Solution Approach 1:
The patent applies parameter changes by modifying the insulating layer structure from a single layer to a stacked-layer configuration with varying film densities. This structural parameter change enables better control over electrical characteristics while maintaining miniaturization, resolving the contradiction between high integration and manufacturing precision
Solution Approach 2:
The patent uses composite materials by combining insulating layers with different film densities (higher density layer and lower density layer) in a stacked configuration. This composite structure provides both the miniaturization needed for high integration and the controlled electrical properties needed for manufacturing precision and reliability
2Volume of moving object
If transistor size is reduced for miniaturization, then device size is improved, but electrical characteristics and reliability deteriorate
Solution Approach 1:
The patent applies local quality by creating regions with different insulating properties within the gate insulating layer structure. The higher density insulating layer provides strong insulation in critical areas, while the lower density layer provides appropriate electrical characteristics, enabling miniaturization without sacrificing reliability
Solution Approach 2:
The patent resolves the contradiction by transitioning from a single-layer to a multi-layer vertical structure. This dimensional change in the insulating layer configuration allows the device to achieve miniaturization in the planar direction while maintaining reliable electrical characteristics through the vertical stacking of functional layers
3Reliability
If complex stacked-layer structure is implemented to improve electrical characteristics, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the gate insulating layer into multiple stacked layers with different film densities. This segmentation allows each layer to perform specific functions (one layer for strong insulation, another for electrical characteristic control), improving reliability while keeping the overall structure manageable through clear functional division
Data Source
AI summary
A semiconductor device including a transistor having a minute size is provided. The semiconductor device includes a transistor, a first insulating layer, and a second insulating layer. The transistor includes a first semiconductor layer, a first conductive layer, a second conductive layer including a region overlapping with the first conductive layer with the first insulating layer therebetween, a third conductive layer, and a third insulating layer. The second conductive layer and the first insulating layer have a first opening reaching the first conductive layer. The first semiconductor layer is in contact with a top surface and a side surface of the second conductive layer, a side surface of the first insulating layer, and a top surface of the first conductive layer. The third insulating layer is provided over the first insulating layer, the first semiconductor layer, and the second conductive layer. The third conductive layer is provided over the third insulating layer. The second insulating layer is provided over the third conductive layer and the third insulating layer.