Stacked Interconnect Layout to Reduce Gate Antenna Damage
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Solution Overview
Problem
The antenna effect in semiconductor devices, where long wirings are charged during the etching process, leads to degradation of the gate insulating film and increased leak current due to accumulated charge in gate electrodes.
Innovation Solution
A semiconductor device design that includes a substrate with alternating stacks of first and second wirings and vias on respective contacts of transistors, where the length of the second wiring is less than the first wiring, and the distance between the uppermost wirings increases with distance from the substrate, reducing the antenna effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If long wirings are used in the connecting structure, then electrical connection is achieved, but antenna effect occurs causing gate insulating film degradation and leak current increase
Solution Approach 1:
The patent divides the connecting structure into multiple separate wiring segments (first wiring, second wiring, third wiring) instead of using a single long continuous wiring. These segments are connected through vias (first connecting via, second connecting via) to achieve the same electrical connection function while reducing the antenna effect by breaking up the continuous conductive path.
Solution Approach 2:
The patent utilizes vertical stacking in the third dimension to reduce horizontal wiring length. By arranging wirings and vias in alternating stacked layers, the design achieves electrical connection through vertical pathways, thereby reducing the horizontal extent of long wirings that cause antenna effects.
2Reliability
If alternating stacked structure of wirings and vias is implemented, then antenna effect is reduced, but device complexity increases
Solution Approach 1:
The patent combines multiple functions into the alternating stacked structure: electrical connection, insulation, and antenna effect reduction are all achieved through the integrated sequence of wirings and insulating films with vias. By merging these functions into a single unified structure rather than separate components, the patent reduces overall device complexity while maintaining the benefits of antenna effect mitigation.
Solution Approach 2:
The alternating stacked structure serves multiple purposes simultaneously: the wirings provide electrical connection, the insulating films provide electrical isolation, and the vertical arrangement with varying wiring lengths provides antenna effect reduction. This multi-functional design eliminates the need for separate structures for each function, thereby managing device complexity effectively.
Data Source
AI summary
A semiconductor device includes a substrate; a first transistor on the substrate; a first contact on a source/drain pattern of the first transistor; a second transistor on the substrate; a second contact on a gate electrode of the second transistor; a first connecting structure that includes at least one first wiring and at least one first via that are alternately stacked on the first contact; a second connecting structure that includes at least one second wiring and at least one second via that are alternately stacked on the second contact; a first connecting via on the first connecting structure; a second connecting via on the second connecting structure; and a connecting wiring on the first connecting via and the second connecting via.